diff --git a/plat/xilinx/zynqmp/include/platform_def.h b/plat/xilinx/zynqmp/include/platform_def.h
index 3c1a9e5c8..047aeaa16 100644
--- a/plat/xilinx/zynqmp/include/platform_def.h
+++ b/plat/xilinx/zynqmp/include/platform_def.h
@@ -113,7 +113,6 @@
  * as Group 0 interrupts.
  */
 #define PLAT_ARM_G1S_IRQS	ARM_IRQ_SEC_PHY_TIMER,	\
-				IRQ_SEC_IPI_APU,	\
 				ARM_IRQ_SEC_SGI_0,	\
 				ARM_IRQ_SEC_SGI_1,	\
 				ARM_IRQ_SEC_SGI_2,	\
diff --git a/plat/xilinx/zynqmp/pm_service/pm_client.c b/plat/xilinx/zynqmp/pm_service/pm_client.c
index b77a1cf09..e102b4f2c 100644
--- a/plat/xilinx/zynqmp/pm_service/pm_client.c
+++ b/plat/xilinx/zynqmp/pm_service/pm_client.c
@@ -40,7 +40,6 @@
 #include <bl_common.h>
 #include <mmio.h>
 #include <string.h>
-#include <utils.h>
 #include "pm_api_sys.h"
 #include "pm_client.h"
 #include "pm_ipi.h"
diff --git a/plat/xilinx/zynqmp/pm_service/pm_ipi.c b/plat/xilinx/zynqmp/pm_service/pm_ipi.c
index 6648fec73..5fd9d550d 100644
--- a/plat/xilinx/zynqmp/pm_service/pm_ipi.c
+++ b/plat/xilinx/zynqmp/pm_service/pm_ipi.c
@@ -96,7 +96,6 @@ const struct pm_ipi apu_ipi = {
  *		Any other return value will cause the framework to ignore
  *		the service
  *
- * Enable interrupts at registered entrance in IPI peripheral
  * Called from pm_setup initialization function
  */
 int pm_ipi_init(void)
diff --git a/plat/xilinx/zynqmp/pm_service/pm_svc_main.c b/plat/xilinx/zynqmp/pm_service/pm_svc_main.c
index c062392e4..34823757a 100644
--- a/plat/xilinx/zynqmp/pm_service/pm_svc_main.c
+++ b/plat/xilinx/zynqmp/pm_service/pm_svc_main.c
@@ -68,7 +68,6 @@ static struct {
  *
  * Called from sip_svc_setup initialization function with the
  * rt_svc_init signature.
- *
  */
 int pm_setup(void)
 {
diff --git a/plat/xilinx/zynqmp/zynqmp_def.h b/plat/xilinx/zynqmp/zynqmp_def.h
index 37951e03d..bdca3b490 100644
--- a/plat/xilinx/zynqmp/zynqmp_def.h
+++ b/plat/xilinx/zynqmp/zynqmp_def.h
@@ -122,7 +122,6 @@
 #define BASE_GICH_BASE		0xF9040000
 #define BASE_GICV_BASE		0xF9060000
 
-#define IRQ_SEC_IPI_APU			67
 #define ARM_IRQ_SEC_PHY_TIMER		29
 
 #define ARM_IRQ_SEC_SGI_0		8