Fix MISRA rule 8.3 in common code
Rule 8.3: All declarations of an object or function shall use the same names and type qualifiers. Change-Id: Iff384187c74a598a4e73f350a1893b60e9d16cec Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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322a98b632
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9fb8af33c4
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
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*
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*
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* SPDX-License-Identifier: BSD-3-Clause
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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*/
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@ -99,7 +99,7 @@ void cm_set_context_by_mpidr(uint64_t mpidr, void *context, uint32_t security_st
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* existing cm library routines. This function is expected to be invoked for
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* existing cm library routines. This function is expected to be invoked for
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* initializing the cpu_context for the CPU specified by MPIDR for first use.
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* initializing the cpu_context for the CPU specified by MPIDR for first use.
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******************************************************************************/
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******************************************************************************/
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void cm_init_context(unsigned long mpidr, const entry_point_info_t *ep)
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void cm_init_context(uint64_t mpidr, const entry_point_info_t *ep)
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{
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{
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if ((mpidr & MPIDR_AFFINITY_MASK) ==
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if ((mpidr & MPIDR_AFFINITY_MASK) ==
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(read_mpidr_el1() & MPIDR_AFFINITY_MASK))
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(read_mpidr_el1() & MPIDR_AFFINITY_MASK))
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
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*
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*
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* SPDX-License-Identifier: BSD-3-Clause
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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*/
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@ -12,7 +12,7 @@
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/***********************************************************
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/***********************************************************
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* The delay timer implementation
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* The delay timer implementation
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***********************************************************/
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***********************************************************/
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static const timer_ops_t *ops;
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static const timer_ops_t *timer_ops;
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/***********************************************************
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/***********************************************************
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* Delay for the given number of microseconds. The driver must
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* Delay for the given number of microseconds. The driver must
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@ -20,26 +20,27 @@ static const timer_ops_t *ops;
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***********************************************************/
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***********************************************************/
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void udelay(uint32_t usec)
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void udelay(uint32_t usec)
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{
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{
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assert(ops != NULL &&
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assert(timer_ops != NULL &&
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(ops->clk_mult != 0) &&
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(timer_ops->clk_mult != 0) &&
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(ops->clk_div != 0) &&
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(timer_ops->clk_div != 0) &&
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(ops->get_timer_value != NULL));
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(timer_ops->get_timer_value != NULL));
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uint32_t start, delta, total_delta;
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uint32_t start, delta, total_delta;
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assert(usec < UINT32_MAX / ops->clk_div);
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assert(usec < UINT32_MAX / timer_ops->clk_div);
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start = ops->get_timer_value();
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start = timer_ops->get_timer_value();
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/* Add an extra tick to avoid delaying less than requested. */
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/* Add an extra tick to avoid delaying less than requested. */
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total_delta = div_round_up(usec * ops->clk_div, ops->clk_mult) + 1;
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total_delta =
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div_round_up(usec * timer_ops->clk_div, timer_ops->clk_mult) + 1;
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do {
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do {
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/*
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/*
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* If the timer value wraps around, the subtraction will
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* If the timer value wraps around, the subtraction will
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* overflow and it will still give the correct result.
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* overflow and it will still give the correct result.
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*/
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*/
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delta = start - ops->get_timer_value(); /* Decreasing counter */
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delta = start - timer_ops->get_timer_value(); /* Decreasing counter */
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} while (delta < total_delta);
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} while (delta < total_delta);
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}
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}
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@ -64,5 +65,5 @@ void timer_init(const timer_ops_t *ops_ptr)
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(ops_ptr->clk_div != 0) &&
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(ops_ptr->clk_div != 0) &&
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(ops_ptr->get_timer_value != NULL));
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(ops_ptr->get_timer_value != NULL));
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ops = ops_ptr;
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timer_ops = ops_ptr;
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}
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}
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
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*
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*
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* SPDX-License-Identifier: BSD-3-Clause
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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*/
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@ -13,10 +13,10 @@
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* Function prototypes
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* Function prototypes
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******************************************************************************/
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******************************************************************************/
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void bl31_next_el_arch_setup(uint32_t security_state);
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void bl31_next_el_arch_setup(uint32_t security_state);
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void bl31_set_next_image_type(uint32_t type);
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void bl31_set_next_image_type(uint32_t security_state);
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uint32_t bl31_get_next_image_type(void);
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uint32_t bl31_get_next_image_type(void);
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void bl31_prepare_next_image_entry(void);
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void bl31_prepare_next_image_entry(void);
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void bl31_register_bl32_init(int32_t (*)(void));
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void bl31_register_bl32_init(int32_t (*func)(void));
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void bl31_warm_entrypoint(void);
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void bl31_warm_entrypoint(void);
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#endif /* __BL31_H__ */
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#endif /* __BL31_H__ */
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@ -124,7 +124,7 @@ int32_t set_routing_model(uint32_t type, uint32_t flags);
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int32_t register_interrupt_type_handler(uint32_t type,
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int32_t register_interrupt_type_handler(uint32_t type,
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interrupt_type_handler_t handler,
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interrupt_type_handler_t handler,
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uint32_t flags);
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uint32_t flags);
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interrupt_type_handler_t get_interrupt_type_handler(uint32_t interrupt_type);
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interrupt_type_handler_t get_interrupt_type_handler(uint32_t type);
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int disable_intr_rm_local(uint32_t type, uint32_t security_state);
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int disable_intr_rm_local(uint32_t type, uint32_t security_state);
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int enable_intr_rm_local(uint32_t type, uint32_t security_state);
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int enable_intr_rm_local(uint32_t type, uint32_t security_state);
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
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*
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*
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* SPDX-License-Identifier: BSD-3-Clause
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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*/
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@ -210,7 +210,7 @@ int load_auth_image(unsigned int image_id, image_info_t *image_data);
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#else
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#else
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uintptr_t page_align(uintptr_t, unsigned);
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uintptr_t page_align(uintptr_t value, unsigned dir);
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int load_image(meminfo_t *mem_layout,
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int load_image(meminfo_t *mem_layout,
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unsigned int image_id,
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unsigned int image_id,
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uintptr_t image_base,
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uintptr_t image_base,
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
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*
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*
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* SPDX-License-Identifier: BSD-3-Clause
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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*/
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@ -25,7 +25,7 @@ typedef struct timer_ops {
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void mdelay(uint32_t msec);
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void mdelay(uint32_t msec);
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void udelay(uint32_t usec);
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void udelay(uint32_t usec);
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void timer_init(const timer_ops_t *ops);
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void timer_init(const timer_ops_t *ops_ptr);
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#endif /* __DELAY_TIMER_H__ */
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#endif /* __DELAY_TIMER_H__ */
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/*
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/*
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* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
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*
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*
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* SPDX-License-Identifier: BSD-3-Clause
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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*/
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@ -162,7 +162,7 @@
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int pmf_get_timestamp_smc(unsigned int tid,
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int pmf_get_timestamp_smc(unsigned int tid,
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u_register_t mpidr,
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u_register_t mpidr,
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unsigned int flags,
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unsigned int flags,
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unsigned long long *ts);
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unsigned long long *ts_value);
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int pmf_setup(void);
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int pmf_setup(void);
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uintptr_t pmf_smc_handler(unsigned int smc_fid,
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uintptr_t pmf_smc_handler(unsigned int smc_fid,
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u_register_t x1,
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u_register_t x1,
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@ -301,7 +301,7 @@ struct entry_point_info *bl31_plat_get_next_image_ep_info(uint32_t type);
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* Mandatory PSCI functions (BL31)
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* Mandatory PSCI functions (BL31)
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******************************************************************************/
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******************************************************************************/
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int plat_setup_psci_ops(uintptr_t sec_entrypoint,
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int plat_setup_psci_ops(uintptr_t sec_entrypoint,
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const struct plat_psci_ops **);
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const struct plat_psci_ops **psci_ops);
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const unsigned char *plat_get_power_domain_tree_desc(void);
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const unsigned char *plat_get_power_domain_tree_desc(void);
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/*******************************************************************************
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/*******************************************************************************
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@ -311,7 +311,7 @@ void plat_psci_stat_accounting_start(const psci_power_state_t *state_info);
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void plat_psci_stat_accounting_stop(const psci_power_state_t *state_info);
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void plat_psci_stat_accounting_stop(const psci_power_state_t *state_info);
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u_register_t plat_psci_stat_get_residency(unsigned int lvl,
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u_register_t plat_psci_stat_get_residency(unsigned int lvl,
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const psci_power_state_t *state_info,
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const psci_power_state_t *state_info,
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int last_cpu_index);
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int last_cpu_idx);
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plat_local_state_t plat_get_target_pwr_state(unsigned int lvl,
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plat_local_state_t plat_get_target_pwr_state(unsigned int lvl,
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const plat_local_state_t *states,
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const plat_local_state_t *states,
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unsigned int ncpu);
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unsigned int ncpu);
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@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
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*
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*
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* SPDX-License-Identifier: BSD-3-Clause
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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*/
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@ -218,7 +218,7 @@ void psci_acquire_pwr_domain_locks(unsigned int end_pwrlvl,
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void psci_release_pwr_domain_locks(unsigned int end_pwrlvl,
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void psci_release_pwr_domain_locks(unsigned int end_pwrlvl,
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unsigned int cpu_idx);
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unsigned int cpu_idx);
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int psci_validate_suspend_req(const psci_power_state_t *state_info,
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int psci_validate_suspend_req(const psci_power_state_t *state_info,
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unsigned int is_power_down_state_req);
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unsigned int is_power_down_state);
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unsigned int psci_find_max_off_lvl(const psci_power_state_t *state_info);
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unsigned int psci_find_max_off_lvl(const psci_power_state_t *state_info);
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unsigned int psci_find_target_suspend_lvl(const psci_power_state_t *state_info);
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unsigned int psci_find_target_suspend_lvl(const psci_power_state_t *state_info);
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void psci_set_pwr_domains_to_run(unsigned int end_pwrlvl);
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void psci_set_pwr_domains_to_run(unsigned int end_pwrlvl);
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@ -248,7 +248,7 @@ int psci_do_cpu_off(unsigned int end_pwrlvl);
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void psci_cpu_suspend_start(entry_point_info_t *ep,
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void psci_cpu_suspend_start(entry_point_info_t *ep,
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unsigned int end_pwrlvl,
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unsigned int end_pwrlvl,
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psci_power_state_t *state_info,
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psci_power_state_t *state_info,
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unsigned int is_power_down_state_req);
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unsigned int is_power_down_state);
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void psci_cpu_suspend_finish(unsigned int cpu_idx,
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void psci_cpu_suspend_finish(unsigned int cpu_idx,
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psci_power_state_t *state_info);
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psci_power_state_t *state_info);
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/*
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/*
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* Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
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*
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*
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* SPDX-License-Identifier: BSD-3-Clause
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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*/
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@ -83,7 +83,7 @@ unsigned long long xlat_arch_get_max_supported_pa(void);
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/* Enable MMU and configure it to use the specified translation tables. */
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/* Enable MMU and configure it to use the specified translation tables. */
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void enable_mmu_arch(unsigned int flags, uint64_t *base_table,
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void enable_mmu_arch(unsigned int flags, uint64_t *base_table,
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unsigned long long pa, uintptr_t max_va);
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unsigned long long max_pa, uintptr_t max_va);
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/*
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/*
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* Return 1 if the MMU of the translation regime managed by the given xlat_ctx_t
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* Return 1 if the MMU of the translation regime managed by the given xlat_ctx_t
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