Enable Debug and SError exceptions on warm boot path
Enable Debug and SError exceptions: - when receiving an SMC; - when a CPU is physically powered up (upon resumption from suspend or in response to a PSCI cpu_on call) Change-Id: I7e5613e34034be6ed68ec9e2aef4de66aa5ac65e
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@ -59,6 +59,12 @@
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* -----------------------------------------------------
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* -----------------------------------------------------
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*/
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*/
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.macro handle_sync_exception
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.macro handle_sync_exception
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/* ---------------------------------------------
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* Enable Debug and SError interrupts
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* ---------------------------------------------
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*/
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msr daifclr, #(DAIF_ABT_BIT | DAIF_DBG_BIT)
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stp x30, xzr, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR]
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stp x30, xzr, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR]
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mrs x30, esr_el3
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mrs x30, esr_el3
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ubfx x30, x30, #ESR_EC_SHIFT, #ESR_EC_LENGTH
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ubfx x30, x30, #ESR_EC_SHIFT, #ESR_EC_LENGTH
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@ -75,6 +75,12 @@ psci_aff_common_finish_entry:
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msr vbar_el3, x0
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msr vbar_el3, x0
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isb
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isb
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/* ---------------------------------------------
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* Enable Debug and SError interrupts
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* ---------------------------------------------
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*/
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msr daifclr, #(DAIF_ABT_BIT | DAIF_DBG_BIT)
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/* ---------------------------------------------
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/* ---------------------------------------------
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* Use SP_EL0 for the C runtime stack.
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* Use SP_EL0 for the C runtime stack.
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* ---------------------------------------------
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* ---------------------------------------------
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