andrius
/
arm-trusted-firmware
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

refactor(stm32mp1): improve DGBMCU driver 

Add function headers to improve readability.
Add asserts when required.
Use RCC_BASE address.

Change-Id: Ia545293f00167b6276331a986ea7aa08c006e004
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
This commit is contained in:
Nicolas Le Bayon 2019-09-19 11:27:24 +02:00 committed by Yann Gautier
parent 9a73a56c35
commit a24d5947af
1 changed files with 22 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

32
plat/st/stm32mp1/stm32mp1_dbgmcu.c
View File

@ -1,9 +1,10 @@
/*
* Copyright (c) 2016-2019, STMicroelectronics - All Rights Reserved
* Copyright (c) 2016-2021, STMicroelectronics - All Rights Reserved
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <assert.h>
#include <errno.h>
#include <platform_def.h>
@ -25,16 +26,9 @@
#define DBGMCU_APB4FZ1_IWDG2 BIT(2)
static uintptr_t get_rcc_base(void)
{
/* This is called before stm32mp_rcc_base() is available */
return RCC_BASE;
}
static int stm32mp1_dbgmcu_init(void)
{
uint32_t dbg_conf;
uintptr_t rcc_base = get_rcc_base();
dbg_conf = bsec_read_debug_conf();
@ -48,13 +42,20 @@ static int stm32mp1_dbgmcu_init(void)
}
}
mmio_setbits_32(rcc_base + RCC_DBGCFGR, RCC_DBGCFGR_DBGCKEN);
mmio_setbits_32(RCC_BASE + RCC_DBGCFGR, RCC_DBGCFGR_DBGCKEN);
return 0;
}
/*
* @brief Get silicon revision from DBGMCU registers.
* @param chip_version: pointer to the read value.
* @retval 0 on success, negative value on failure.
*/
int stm32mp1_dbgmcu_get_chip_version(uint32_t *chip_version)
{
assert(chip_version != NULL);
if (stm32mp1_dbgmcu_init() != 0) {
return -EPERM;
}
@ -65,18 +66,29 @@ int stm32mp1_dbgmcu_get_chip_version(uint32_t *chip_version)
return 0;
}
/*
* @brief Get device ID from DBGMCU registers.
* @param chip_dev_id: pointer to the read value.
* @retval 0 on success, negative value on failure.
*/
int stm32mp1_dbgmcu_get_chip_dev_id(uint32_t *chip_dev_id)
{
assert(chip_dev_id != NULL);
if (stm32mp1_dbgmcu_init() != 0) {
return -EPERM;
}
*chip_dev_id = mmio_read_32(DBGMCU_BASE + DBGMCU_IDC) &
DBGMCU_IDC_DEV_ID_MASK;
DBGMCU_IDC_DEV_ID_MASK;
return 0;
}
/*
* @brief Freeze IWDG2 in debug mode.
* @retval None.
*/
int stm32mp1_dbgmcu_freeze_iwdg2(void)
{
uint32_t dbg_conf;