Tegra194: config to enable/disable strict checking mode
This patch adds a new configuration option to the platform makefiles that disables/enables strict checking mode. The config is enabled by default. Change-Id: I727dd0facee88d9517bf6956eaf9163eba25c8bb Signed-off-by: Steven Kao <skao@nvidia.com>
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -186,6 +186,7 @@ void mce_verify_firmware_version(void)
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}
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}
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#if ENABLE_STRICT_CHECKING_MODE
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/*******************************************************************************
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* Handler to enable the strict checking mode
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******************************************************************************/
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@ -235,3 +236,4 @@ void mce_enable_strict_checking(void)
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nvg_enable_strict_checking_mode();
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}
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}
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#endif
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@ -288,6 +288,7 @@ int32_t nvg_enter_cstate(uint32_t state, uint32_t wake_time)
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return ret;
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}
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#if ENABLE_STRICT_CHECKING_MODE
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/*
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* Enable strict checking mode
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*
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@ -300,3 +301,4 @@ void nvg_enable_strict_checking_mode(void)
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nvg_set_request_data(TEGRA_NVG_CHANNEL_SECURITY_CONFIG, params);
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}
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#endif
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@ -357,11 +357,13 @@ int32_t tegra_soc_pwr_domain_on_finish(const psci_power_state_t *target_state)
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*/
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if (stateid_afflvl2 == PSTATE_ID_SOC_POWERDN) {
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#if ENABLE_STRICT_CHECKING_MODE
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/*
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* Enable strict checking after programming the GSC for
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* enabling TZSRAM and TZDRAM
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*/
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mce_enable_strict_checking();
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#endif
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/* Init SMMU */
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tegra_smmu_init();
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@ -293,9 +293,11 @@ plat_params_from_bl2_t *plat_get_bl31_plat_params(void)
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void plat_late_platform_setup(void)
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{
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#if ENABLE_STRICT_CHECKING_MODE
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/*
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* Enable strict checking after programming the GSC for
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* enabling TZSRAM and TZDRAM
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*/
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mce_enable_strict_checking();
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#endif
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}
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@ -8,6 +8,9 @@
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ENABLE_CONSOLE_SPE := 0
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$(eval $(call add_define,ENABLE_CONSOLE_SPE))
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ENABLE_STRICT_CHECKING_MODE := 1
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$(eval $(call add_define,ENABLE_STRICT_CHECKING_MODE))
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RESET_TO_BL31 := 1
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PROGRAMMABLE_RESET_ADDRESS := 1
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