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Merge pull request #1815 from Anson-Huang/gic 

gic: make sure ProcessorSleep bit clear successfully
This commit is contained in:
Antonio Niño Díaz 2019-03-01 12:42:33 +00:00 committed by GitHub
parent a4acc7f165 e655fefcea
commit a6388e49dc
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1 changed files with 21 additions and 0 deletions
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21
plat/imx/common/plat_imx8_gic.c
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@ -9,6 +9,8 @@
#include <common/bl_common.h>
#include <common/interrupt_props.h>
#include <drivers/arm/gicv3.h>
#include <drivers/arm/arm_gicv3_common.h>
#include <lib/mmio.h>
#include <lib/utils.h>
#include <plat/common/platform.h>
@ -52,8 +54,27 @@ void plat_gic_driver_init(void)
#endif
}
static __inline void plat_gicr_exit_sleep(void)
{
unsigned int val = mmio_read_32(PLAT_GICR_BASE + GICR_WAKER);
/*
* ProcessorSleep bit can ONLY be set to zero when
* Quiescent bit and Sleep bit are both zero, so
* need to make sure Quiescent bit and Sleep bit
* are zero before clearing ProcessorSleep bit.
*/
if (val & WAKER_QSC_BIT) {
mmio_write_32(PLAT_GICR_BASE + GICR_WAKER, val & ~WAKER_SL_BIT);
/* Wait till the WAKER_QSC_BIT changes to 0 */
while ((mmio_read_32(PLAT_GICR_BASE + GICR_WAKER) & WAKER_QSC_BIT) != 0U)
;
}
}
void plat_gic_init(void)
{
plat_gicr_exit_sleep();
gicv3_distif_init();
gicv3_rdistif_init(plat_my_core_pos());
gicv3_cpuif_enable(plat_my_core_pos());