Merge "aarch32: Allow compiling with soft-float toolchain" into integration
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a738e1554c
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@ -92,9 +92,14 @@
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*
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* FPEXC.EN: Enable access to Advanced SIMD and floating point features
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* from all exception levels.
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*
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* __SOFTFP__: Predefined macro exposed by soft-float toolchain.
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* ARMv7 and Cortex-A32(ARMv8/aarch32) has both soft-float and
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* hard-float variants of toolchain, avoid compiling below code with
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* soft-float toolchain as "vmsr" instruction will not be recognized.
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* ---------------------------------------------------------------------
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*/
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#if (ARM_ARCH_MAJOR > 7) || defined(ARMV7_SUPPORTS_VFP)
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#if ((ARM_ARCH_MAJOR > 7) || defined(ARMV7_SUPPORTS_VFP)) && !(__SOFTFP__)
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ldr r0, =(FPEXC_RESET_VAL | FPEXC_EN_BIT)
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vmsr FPEXC, r0
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isb
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