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rockchip/rk3399: do secure timer init in pmusram 

we will use timer in pmusarm, when logic power rail shutdown,
the secure timer will gone, so need to initial it in pmusram.

Change-Id: I472e7eec3fc197f56223e6fff9167556c1c5e3bc
Signed-off-by: Lin Huang <hl@rock-chips.com>
This commit is contained in:
Lin Huang 2017-05-27 17:47:01 +08:00 committed by Caesar Wang
parent 4c3770d9cf
commit a7bb3388b1
3 changed files with 16 additions and 0 deletions
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2
plat/rockchip/rk3399/drivers/dram/suspend.c
View File

@ -726,6 +726,8 @@ __pmusramfunc void dmc_resume(void)
uint32_t channel_mask = 0;
uint32_t channel;
sram_secure_timer_init();
/*
* we switch ddr clock to abpll when suspend,
* we set back to dpll here

13
plat/rockchip/rk3399/drivers/secure/secure.c
View File

@ -101,6 +101,19 @@ void secure_watchdog_enable(void)
WMSK_BIT(PCLK_WDT_CM0_GATE_SHIFT));
}
__pmusramfunc void sram_secure_timer_init(void)
{
mmio_write_32(STIMER1_CHN_BASE(5) + TIMER_END_COUNT0, 0xffffffff);
mmio_write_32(STIMER1_CHN_BASE(5) + TIMER_END_COUNT1, 0xffffffff);
mmio_write_32(STIMER1_CHN_BASE(5) + TIMER_INIT_COUNT0, 0x0);
mmio_write_32(STIMER1_CHN_BASE(5) + TIMER_INIT_COUNT0, 0x0);
/* auto reload & enable the timer */
mmio_write_32(STIMER1_CHN_BASE(5) + TIMER_CONTROL_REG,
TIMER_EN | TIMER_FMODE);
}
void secure_timer_init(void)
{
mmio_write_32(STIMER1_CHN_BASE(5) + TIMER_END_COUNT0, 0xffffffff);

1
plat/rockchip/rk3399/drivers/secure/secure.h
View File

@ -100,5 +100,6 @@ void secure_watchdog_enable(void);
void secure_timer_init(void);
void secure_sgrf_init(void);
void secure_sgrf_ddr_rgn_init(void);
__pmusramfunc void sram_secure_timer_init(void);
#endif /* __PLAT_ROCKCHIP_RK3399_DRIVER_SECURE_H__ */