arm_fpga: Remove bogus timer initialisation
The arm_fpga platform code contains an dubious line to initialise some timer. On closer inspection this turn out to be bogus, as this was only needed on some special (older) FPGA board, and is actually not needed on the current model. Also the base address was wrong anyways. Remove the code entirely. Change-Id: I02e71aea645051b5addb42d972d7a79f04b81106 Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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@ -56,7 +56,6 @@ void bl31_platform_setup(void)
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/* Write frequency to CNTCRL and initialize timer */
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generic_delay_timer_init();
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mmio_write_32(FPGA_TIMER_BASE, ((1 << 8) | 1UL));
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}
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entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
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@ -36,6 +36,5 @@
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#define PLAT_FPGA_CRASH_UART_CLK_IN_HZ PLAT_FPGA_BOOT_UART_CLK_IN_HZ
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#define FPGA_TIMER_FREQUENCY 10000000
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#define FPGA_TIMER_BASE 0x2a830000
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#endif
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