From a9cd8630a3e6cc8110262133e53e86c3c68421dc Mon Sep 17 00:00:00 2001 From: Anthony Zhou Date: Mon, 8 May 2017 20:17:08 +0800 Subject: [PATCH] Tegra186: mce: fix trivial MISRA defects This patch fixes MISRA defects for the MCE driver. * Using logical NOT for bool type function * Using MPIDR_AFFLVL_MASK << MPIDR_AFFINITY_BITS replace MPIDR_CLUSTER_MASK Change-Id: I97e96f172a3c1158646a15a184c273c53a103d63 Signed-off-by: Anthony Zhou --- plat/nvidia/tegra/soc/t186/drivers/mce/ari.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/plat/nvidia/tegra/soc/t186/drivers/mce/ari.c b/plat/nvidia/tegra/soc/t186/drivers/mce/ari.c index 1429a6158..3769599e2 100644 --- a/plat/nvidia/tegra/soc/t186/drivers/mce/ari.c +++ b/plat/nvidia/tegra/soc/t186/drivers/mce/ari.c @@ -326,9 +326,11 @@ int32_t ari_is_sc7_allowed(uint32_t ari_base, uint32_t state, uint32_t wake_time int32_t ari_online_core(uint32_t ari_base, uint32_t core) { uint64_t cpu = read_mpidr() & (uint64_t)(MPIDR_CPU_MASK); - uint64_t cluster = (read_mpidr() & (uint64_t)(MPIDR_CLUSTER_MASK)) >> + uint64_t cluster = (read_mpidr() & ((uint64_t)(MPIDR_AFFLVL_MASK) << + (uint64_t)(MPIDR_AFFINITY_BITS))) >> (uint64_t)(MPIDR_AFFINITY_BITS); - uint64_t impl = (read_midr() >> (uint64_t)MIDR_IMPL_SHIFT) & (uint64_t)MIDR_IMPL_MASK; + uint64_t impl = (read_midr() >> (uint64_t)MIDR_IMPL_SHIFT) & + (uint64_t)MIDR_IMPL_MASK; int32_t ret; /* construct the current CPU # */ @@ -497,8 +499,8 @@ int32_t ari_read_write_uncore_perfmon(uint32_t ari_base, uint64_t req, uint64_t *data) { int32_t ret, result; - uint32_t val; - uint8_t req_cmd, req_status; + uint32_t val, req_status; + uint8_t req_cmd; req_cmd = (uint8_t)(req >> UNCORE_PERFMON_CMD_SHIFT); @@ -523,7 +525,7 @@ int32_t ari_read_write_uncore_perfmon(uint32_t ari_base, uint64_t req, result = ret; } else { /* read the command status value */ - req_status = (uint8_t)ari_get_response_high(ari_base) & + req_status = ari_get_response_high(ari_base) & UNCORE_PERFMON_RESP_STATUS_MASK; /*