intel: common: Change how mailbox handles job id & buffer
This patch modifies several basic mailbox driver features to prepare for FCS enablement: - Job id management for asynchronous response - SDM command buffer full Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> Change-Id: I78168dfb6c521d70d9cba187356b7a3c8e9b62d2
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@ -12,9 +12,10 @@
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#define MBOX_OFFSET 0xffa30000
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#define MBOX_MAX_JOB_ID 0xf
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#define MBOX_ATF_CLIENT_ID 0x1
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#define MBOX_JOB_ID 0x1
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#define MBOX_ATF_CLIENT_ID 0x1U
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#define MBOX_MAX_JOB_ID 0xFU
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#define MBOX_MAX_IND_JOB_ID (MBOX_MAX_JOB_ID - 1U)
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#define MBOX_JOB_ID MBOX_MAX_JOB_ID
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/* Mailbox Shared Memory Register Map */
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@ -81,6 +82,7 @@
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#define MBOX_RET_ERROR -1
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#define MBOX_NO_RESPONSE -2
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#define MBOX_WRONG_ID -3
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#define MBOX_BUFFER_FULL -4
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#define MBOX_TIMEOUT -2047
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/* Reconfig Status Response */
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@ -138,11 +140,11 @@ int mailbox_init(void);
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void mailbox_set_qspi_close(void);
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void mailbox_set_qspi_open(void);
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void mailbox_set_qspi_direct(void);
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int mailbox_send_cmd(int job_id, unsigned int cmd, uint32_t *args,
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int mailbox_send_cmd(uint32_t job_id, unsigned int cmd, uint32_t *args,
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int len, int urgent, uint32_t *response, int resp_len);
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int mailbox_send_cmd_async(int job_id, unsigned int cmd, uint32_t *args,
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int mailbox_send_cmd_async(uint32_t *job_id, unsigned int cmd, uint32_t *args,
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int len, int indirect);
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int mailbox_read_response(int job_id, uint32_t *response, int resp_len);
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int mailbox_read_response(uint32_t *job_id, uint32_t *response, int resp_len);
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void mailbox_reset_cold(void);
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void mailbox_clear_response(void);
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@ -55,4 +55,19 @@
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#define SIP_SVC_VERSION_MAJOR 0
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#define SIP_SVC_VERSION_MINOR 1
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/* Structure Definitions */
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struct fpga_config_info {
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uint32_t addr;
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int size;
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int size_written;
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uint32_t write_requested;
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int subblocks_sent;
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int block_number;
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};
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/* Function Definitions */
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bool is_address_in_ddr_range(uint64_t addr, uint64_t size);
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#endif /* SOCFPGA_SIP_SVC_H */
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@ -14,10 +14,16 @@
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static int fill_mailbox_circular_buffer(uint32_t header_cmd, uint32_t *args,
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int len)
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{
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uint32_t cmd_free_offset;
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uint32_t sdm_read_offset, cmd_free_offset;
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int i;
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cmd_free_offset = mmio_read_32(MBOX_OFFSET + MBOX_CIN);
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sdm_read_offset = mmio_read_32(MBOX_OFFSET + MBOX_COUT);
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if ((cmd_free_offset < sdm_read_offset) &&
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(cmd_free_offset + len > sdm_read_offset)) {
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return MBOX_BUFFER_FULL;
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}
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mmio_write_32(MBOX_OFFSET + MBOX_CMD_BUFFER + (cmd_free_offset++ * 4),
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header_cmd);
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@ -35,7 +41,7 @@ static int fill_mailbox_circular_buffer(uint32_t header_cmd, uint32_t *args,
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return MBOX_RET_OK;
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}
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int mailbox_read_response(int job_id, uint32_t *response, int resp_len)
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int mailbox_read_response(uint32_t *job_id, uint32_t *response, int resp_len)
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{
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int rin = 0;
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int rout = 0;
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@ -57,11 +63,13 @@ int mailbox_read_response(int job_id, uint32_t *response, int resp_len)
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rout %= MBOX_RESP_BUFFER_SIZE;
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mmio_write_32(MBOX_OFFSET + MBOX_ROUT, rout);
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if (MBOX_RESP_CLIENT_ID(resp_data) != MBOX_ATF_CLIENT_ID ||
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MBOX_RESP_JOB_ID(resp_data) != job_id) {
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if (MBOX_RESP_CLIENT_ID(resp_data) != MBOX_ATF_CLIENT_ID) {
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return MBOX_WRONG_ID;
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}
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*job_id = MBOX_RESP_JOB_ID(resp_data);
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if (MBOX_RESP_ERR(resp_data) > 0) {
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INFO("Error in response: %x\n", resp_data);
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return -resp_data;
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@ -90,7 +98,7 @@ int mailbox_read_response(int job_id, uint32_t *response, int resp_len)
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}
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int mailbox_poll_response(int job_id, int urgent, uint32_t *response,
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int mailbox_poll_response(uint32_t job_id, int urgent, uint32_t *response,
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int resp_len)
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{
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int timeout = 0xFFFFFF;
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@ -170,21 +178,28 @@ int mailbox_poll_response(int job_id, int urgent, uint32_t *response,
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}
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}
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int mailbox_send_cmd_async(int job_id, unsigned int cmd, uint32_t *args,
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int mailbox_send_cmd_async(uint32_t *job_id, unsigned int cmd, uint32_t *args,
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int len, int indirect)
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{
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fill_mailbox_circular_buffer(MBOX_CLIENT_ID_CMD(MBOX_ATF_CLIENT_ID) |
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MBOX_JOB_ID_CMD(job_id) |
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int status;
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status = fill_mailbox_circular_buffer(
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MBOX_CLIENT_ID_CMD(MBOX_ATF_CLIENT_ID) |
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MBOX_JOB_ID_CMD(*job_id) |
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MBOX_CMD_LEN_CMD(len) |
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MBOX_INDIRECT(indirect) |
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cmd, args, len);
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if (status < 0) {
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return status;
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}
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mmio_write_32(MBOX_OFFSET + MBOX_DOORBELL_TO_SDM, 1);
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*job_id = (*job_id + 1) % MBOX_MAX_IND_JOB_ID;
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return MBOX_RET_OK;
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}
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int mailbox_send_cmd(int job_id, unsigned int cmd, uint32_t *args,
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int mailbox_send_cmd(uint32_t job_id, unsigned int cmd, uint32_t *args,
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int len, int urgent, uint32_t *response, int resp_len)
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{
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int status = 0;
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@ -14,30 +14,15 @@
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#include "socfpga_reset_manager.h"
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#include "socfpga_sip_svc.h"
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/* Number of SiP Calls implemented */
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#define SIP_NUM_CALLS 0x3
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/* Total buffer the driver can hold */
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#define FPGA_CONFIG_BUFFER_SIZE 4
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static int current_block;
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static int read_block;
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static int current_buffer;
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static int send_id;
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static int rcv_id;
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static int max_blocks;
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static uint32_t bytes_per_block;
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static uint32_t blocks_submitted;
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static int is_partial_reconfig;
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static int current_block, current_buffer;
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static int read_block, max_blocks, is_partial_reconfig;
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static uint32_t send_id, rcv_id;
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static uint32_t bytes_per_block, blocks_submitted;
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struct fpga_config_info {
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uint32_t addr;
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int size;
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int size_written;
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uint32_t write_requested;
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int subblocks_sent;
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int block_number;
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};
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/* SiP Service UUID */
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DEFINE_SVC_UUID2(intl_svc_uid,
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@ -74,9 +59,8 @@ static int intel_fpga_sdm_write_buffer(struct fpga_config_info *buffer)
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args[2] = bytes_per_block;
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buffer->size_written += args[2];
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mailbox_send_cmd_async(send_id++ % MBOX_MAX_JOB_ID,
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MBOX_RECONFIG_DATA, args, 3,
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CMD_INDIRECT);
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mailbox_send_cmd_async(&send_id, MBOX_RECONFIG_DATA, args,
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3, CMD_INDIRECT);
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buffer->subblocks_sent++;
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max_blocks--;
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@ -142,7 +126,7 @@ static int mark_last_buffer_xfer_completed(uint32_t *buffer_addr_completed)
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}
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static int intel_fpga_config_completed_write(uint32_t *completed_addr,
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uint32_t *count)
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uint32_t *count, uint32_t *job_id)
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{
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uint32_t status = INTEL_SIP_SMC_STATUS_OK;
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*count = 0;
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@ -152,14 +136,13 @@ static int intel_fpga_config_completed_write(uint32_t *completed_addr,
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while (*count < 3) {
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resp_len = mailbox_read_response(rcv_id % MBOX_MAX_JOB_ID,
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resp_len = mailbox_read_response(job_id,
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resp, ARRAY_SIZE(resp));
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if (resp_len < 0)
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break;
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max_blocks++;
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rcv_id++;
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if (mark_last_buffer_xfer_completed(
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&completed_addr[*count]) == 0)
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@ -231,8 +214,6 @@ static int intel_fpga_config_start(uint32_t config_type)
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current_block = 0;
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read_block = 0;
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current_buffer = 0;
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send_id = 0;
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rcv_id = 0;
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/* full reconfiguration */
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if (!is_partial_reconfig) {
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@ -251,7 +232,7 @@ static bool is_fpga_config_buffer_full(void)
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return true;
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}
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static bool is_address_in_ddr_range(uint64_t addr, uint64_t size)
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bool is_address_in_ddr_range(uint64_t addr, uint64_t size)
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{
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if (size > (UINT64_MAX - addr))
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return false;
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@ -440,11 +421,10 @@ uintptr_t sip_smc_handler(uint32_t smc_fid,
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void *handle,
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u_register_t flags)
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{
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uint32_t val = 0;
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uint32_t retval = 0;
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uint32_t status = INTEL_SIP_SMC_STATUS_OK;
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uint32_t completed_addr[3];
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uint64_t rsu_respbuf[9];
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uint32_t count = 0;
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u_register_t x5, x6;
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int mbox_status, len_in_resp;
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@ -474,8 +454,8 @@ uintptr_t sip_smc_handler(uint32_t smc_fid,
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case INTEL_SIP_SMC_FPGA_CONFIG_COMPLETED_WRITE:
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status = intel_fpga_config_completed_write(completed_addr,
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&count);
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switch (count) {
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&retval, &rcv_id);
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switch (retval) {
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case 1:
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SMC_RET4(handle, INTEL_SIP_SMC_STATUS_OK,
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completed_addr[0], 0, 0);
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}
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case INTEL_SIP_SMC_REG_READ:
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status = intel_secure_reg_read(x1, &val);
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SMC_RET3(handle, status, val, x1);
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status = intel_secure_reg_read(x1, &retval);
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SMC_RET3(handle, status, retval, x1);
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case INTEL_SIP_SMC_REG_WRITE:
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status = intel_secure_reg_write(x1, (uint32_t)x2, &val);
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SMC_RET3(handle, status, val, x1);
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status = intel_secure_reg_write(x1, (uint32_t)x2, &retval);
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SMC_RET3(handle, status, retval, x1);
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case INTEL_SIP_SMC_REG_UPDATE:
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status = intel_secure_reg_update(x1, (uint32_t)x2,
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(uint32_t)x3, &val);
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SMC_RET3(handle, status, val, x1);
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(uint32_t)x3, &retval);
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SMC_RET3(handle, status, retval, x1);
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case INTEL_SIP_SMC_RSU_STATUS:
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status = intel_rsu_status(rsu_respbuf,
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case INTEL_SIP_SMC_RSU_RETRY_COUNTER:
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status = intel_rsu_retry_counter((uint32_t *)rsu_respbuf,
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ARRAY_SIZE(rsu_respbuf), &val);
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ARRAY_SIZE(rsu_respbuf), &retval);
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if (status) {
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SMC_RET1(handle, status);
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} else {
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SMC_RET2(handle, status, val);
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SMC_RET2(handle, status, retval);
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}
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case INTEL_SIP_SMC_MBOX_SEND_CMD:
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