From ac097fdf07ad63b567ca751dc518f8445a0baef6 Mon Sep 17 00:00:00 2001 From: Sieu Mun Tang Date: Tue, 10 May 2022 23:17:04 +0800 Subject: [PATCH] fix(intel): add flash dcache after return response for INTEL_SIP_SMC_MBOX_SEND_CMD This patch is to add flash dcache after return response in INTEL_SIP_SMC_MBOX_SEND_CMD. Signed-off-by: Sieu Mun Tang Change-Id: Ie9451e352f2b7c41ebb44a1f6be9da35f4600fb9 --- plat/intel/soc/common/socfpga_sip_svc.c | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/plat/intel/soc/common/socfpga_sip_svc.c b/plat/intel/soc/common/socfpga_sip_svc.c index 421d59a80..f7dd3929a 100644 --- a/plat/intel/soc/common/socfpga_sip_svc.c +++ b/plat/intel/soc/common/socfpga_sip_svc.c @@ -502,8 +502,7 @@ static uint32_t intel_smc_fw_version(uint32_t *fw_version) } static uint32_t intel_mbox_send_cmd(uint32_t cmd, uint32_t *args, - unsigned int len, - uint32_t urgent, uint32_t *response, + unsigned int len, uint32_t urgent, uint64_t response, unsigned int resp_len, int *mbox_status, unsigned int *len_in_resp) { @@ -515,7 +514,7 @@ static uint32_t intel_mbox_send_cmd(uint32_t cmd, uint32_t *args, } int status = mailbox_send_cmd(MBOX_JOB_ID, cmd, args, len, urgent, - response, &resp_len); + (uint32_t *) response, &resp_len); if (status < 0) { *mbox_status = -status; @@ -524,6 +523,9 @@ static uint32_t intel_mbox_send_cmd(uint32_t cmd, uint32_t *args, *mbox_status = 0; *len_in_resp = resp_len; + + flush_dcache_range(response, resp_len * MBOX_WORD_BYTE); + return INTEL_SIP_SMC_STATUS_OK; } @@ -769,9 +771,8 @@ uintptr_t sip_smc_handler_v1(uint32_t smc_fid, case INTEL_SIP_SMC_MBOX_SEND_CMD: x5 = SMC_GET_GP(handle, CTX_GPREG_X5); x6 = SMC_GET_GP(handle, CTX_GPREG_X6); - status = intel_mbox_send_cmd(x1, (uint32_t *)x2, x3, x4, - (uint32_t *)x5, x6, &mbox_status, - &len_in_resp); + status = intel_mbox_send_cmd(x1, (uint32_t *)x2, x3, x4, x5, x6, + &mbox_status, &len_in_resp); SMC_RET3(handle, status, mbox_status, len_in_resp); case INTEL_SIP_SMC_GET_USERCODE: