From ac166f64e2397f2c12f261e2baf6f63ae89de385 Mon Sep 17 00:00:00 2001 From: Jacky Bai Date: Tue, 21 May 2019 20:24:52 +0800 Subject: [PATCH] plat: imx8m: Add the aipstz init to config peripheral access AIPSTZ provide access control for all the peripherals connected to it. In this patch all the perperals are configured accessible to all the master. it can be customized based the actual use case. Signed-off-by: Jacky Bai Change-Id: I5ef5baa1da6906f13a60923d27ede336c61e319a --- plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c | 10 +++++++++ plat/imx/imx8m/imx8mm/platform.mk | 1 + plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c | 11 +++++++++ plat/imx/imx8m/imx8mq/platform.mk | 1 + plat/imx/imx8m/imx_aipstz.c | 24 ++++++++++++++++++++ plat/imx/imx8m/include/imx_aipstz.h | 27 +++++++++++++++++++++++ 6 files changed, 74 insertions(+) create mode 100644 plat/imx/imx8m/imx_aipstz.c create mode 100644 plat/imx/imx8m/include/imx_aipstz.h diff --git a/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c b/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c index a541ed377..8bfb5452a 100644 --- a/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c +++ b/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c @@ -22,6 +22,7 @@ #include #include +#include #include #include @@ -31,6 +32,14 @@ static const mmap_region_t imx_mmap[] = { {0}, }; +static const struct aipstz_cfg aipstz[] = { + {IMX_AIPSTZ1, 0x77777777, 0x77777777, .opacr = {0x0, 0x0, 0x0, 0x0, 0x0}, }, + {IMX_AIPSTZ2, 0x77777777, 0x77777777, .opacr = {0x0, 0x0, 0x0, 0x0, 0x0}, }, + {IMX_AIPSTZ3, 0x77777777, 0x77777777, .opacr = {0x0, 0x0, 0x0, 0x0, 0x0}, }, + {IMX_AIPSTZ4, 0x77777777, 0x77777777, .opacr = {0x0, 0x0, 0x0, 0x0, 0x0}, }, + {0}, +}; + static entry_point_info_t bl32_image_ep_info; static entry_point_info_t bl33_image_ep_info; @@ -82,6 +91,7 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, mmio_write_32(IMX_CSU_BASE + i * 4, 0x00ff00ff); } + imx_aipstz_init(aipstz); console_imx_uart_register(IMX_BOOT_UART_BASE, IMX_BOOT_UART_CLK_IN_HZ, IMX_CONSOLE_BAUDRATE, &console); diff --git a/plat/imx/imx8m/imx8mm/platform.mk b/plat/imx/imx8m/imx8mm/platform.mk index 9f9ba922c..bd1c05839 100644 --- a/plat/imx/imx8m/imx8mm/platform.mk +++ b/plat/imx/imx8m/imx8mm/platform.mk @@ -19,6 +19,7 @@ IMX_GIC_SOURCES := drivers/arm/gic/v3/gicv3_helpers.c \ BL31_SOURCES += plat/imx/common/imx8_helpers.S \ plat/imx/imx8m/gpc_common.c \ + plat/imx/imx8m/imx_aipstz.c \ plat/imx/imx8m/imx8m_psci_common.c \ plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c \ plat/imx/imx8m/imx8mm/imx8mm_psci.c \ diff --git a/plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c b/plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c index eadf8811f..47eae86df 100644 --- a/plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c +++ b/plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c @@ -22,6 +22,7 @@ #include #include +#include #include #include @@ -32,6 +33,14 @@ static const mmap_region_t imx_mmap[] = { {0}, }; +static const struct aipstz_cfg aipstz[] = { + {AIPSTZ1_BASE, 0x77777777, 0x77777777, .opacr = {0x0, 0x0, 0x0, 0x0, 0x0}, }, + {AIPSTZ2_BASE, 0x77777777, 0x77777777, .opacr = {0x0, 0x0, 0x0, 0x0, 0x0}, }, + {AIPSTZ3_BASE, 0x77777777, 0x77777777, .opacr = {0x0, 0x0, 0x0, 0x0, 0x0}, }, + {AIPSTZ4_BASE, 0x77777777, 0x77777777, .opacr = {0x0, 0x0, 0x0, 0x0, 0x0}, }, + {0}, +}; + static entry_point_info_t bl32_image_ep_info; static entry_point_info_t bl33_image_ep_info; @@ -78,6 +87,8 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, mmio_write_32(IMX_CSU_BASE + i * 4, 0xffffffff); } + imx_aipstz_init(aipstz); + /* config CAAM JRaMID set MID to Cortex A */ mmio_write_32(CAAM_JR0MID, CAAM_NS_MID); mmio_write_32(CAAM_JR1MID, CAAM_NS_MID); diff --git a/plat/imx/imx8m/imx8mq/platform.mk b/plat/imx/imx8m/imx8mq/platform.mk index 3152c7215..c6bec6f3c 100644 --- a/plat/imx/imx8m/imx8mq/platform.mk +++ b/plat/imx/imx8m/imx8mq/platform.mk @@ -21,6 +21,7 @@ BL31_SOURCES += plat/imx/common/imx8_helpers.S \ plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c \ plat/imx/imx8m/imx8mq/imx8mq_psci.c \ plat/imx/imx8m/gpc_common.c \ + plat/imx/imx8m/imx_aipstz.c \ plat/imx/imx8m/imx8m_psci_common.c \ plat/imx/imx8m/imx8mq/gpc.c \ plat/imx/common/imx8_topology.c \ diff --git a/plat/imx/imx8m/imx_aipstz.c b/plat/imx/imx8m/imx_aipstz.c new file mode 100644 index 000000000..a36e2961a --- /dev/null +++ b/plat/imx/imx8m/imx_aipstz.c @@ -0,0 +1,24 @@ +/* + * copyright (c) 2019, arm limited and contributors. all rights reserved. + * + * spdx-license-identifier: bsd-3-clause + */ + +#include + +#include + +void imx_aipstz_init(const struct aipstz_cfg *aipstz_cfg) +{ + const struct aipstz_cfg *aipstz = aipstz_cfg; + + while (aipstz->base != 0U) { + mmio_write_32(aipstz->base + AIPSTZ_MPR0, aipstz->mpr0); + mmio_write_32(aipstz->base + AIPSTZ_MPR1, aipstz->mpr1); + + for (int i = 0; i < AIPSTZ_OPACR_NUM; i++) + mmio_write_32(aipstz->base + OPACR_OFFSET(i), aipstz->opacr[i]); + + aipstz++; + } +} diff --git a/plat/imx/imx8m/include/imx_aipstz.h b/plat/imx/imx8m/include/imx_aipstz.h new file mode 100644 index 000000000..761686298 --- /dev/null +++ b/plat/imx/imx8m/include/imx_aipstz.h @@ -0,0 +1,27 @@ +/* + * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef IMX_AIPSTZ_H +#define IMX_AIPSTZ_H + +#include + +#define AIPSTZ_MPR0 U(0x0) +#define AIPSTZ_MPR1 U(0x4) + +#define AIPSTZ_OPACR_NUM U(0x5) +#define OPACR_OFFSET(i) U((i) * 4 + 0x40) + +struct aipstz_cfg { + uintptr_t base; + uint32_t mpr0; + uint32_t mpr1; + uint32_t opacr[AIPSTZ_OPACR_NUM]; +}; + +void imx_aipstz_init(const struct aipstz_cfg *aipstz_cfg); + +#endif /* IMX_AIPSTZ_H */