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Initialize SCTLR_EL1 based on MODE_RW bit 

Initializes SCTLR_EL1 based on MODE_RW bit in SPSR for the entry
point. The RES1 bits for SCTLR_EL1 differs for Aarch64 and Aarch32
mode.
This commit is contained in:
Jens Wiklander 2014-09-04 10:23:27 +02:00
parent 087b67a62b
commit ae213cee8c
2 changed files with 8 additions and 1 deletions
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5
bl31/context_mgmt.c
View File

@ -182,7 +182,10 @@ void cm_init_context(uint64_t mpidr, const entry_point_info_t *ep)
* against the CPU support, security state, endianess and pc
*/
sctlr_elx = EP_GET_EE(ep->h.attr) ? SCTLR_EE_BIT : 0;
sctlr_elx |= SCTLR_EL1_RES1;
if (GET_RW(ep->spsr) == MODE_RW_64)
sctlr_elx |= SCTLR_EL1_RES1;
else
sctlr_elx |= SCTLR_AARCH32_EL1_RES1;
write_ctx_reg(get_sysregs_ctx(ctx), CTX_SCTLR_EL1, sctlr_elx);
if ((GET_RW(ep->spsr) == MODE_RW_64

4
include/lib/aarch64/arch.h
View File

@ -121,6 +121,10 @@
#define SCTLR_EL1_RES1 ((1 << 29) | (1 << 28) | (1 << 23) | (1 << 22) | \
(1 << 11))
#define SCTLR_AARCH32_EL1_RES1 \
((1 << 23) | (1 << 22) | (1 << 11) | (1 << 4) | \
(1 << 3))
#define SCTLR_M_BIT (1 << 0)
#define SCTLR_A_BIT (1 << 1)
#define SCTLR_C_BIT (1 << 2)