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allwinner: Adjust SRAM A2 base to include the ARISC vectors 

The ARISC vector area consists of 0x4000 bytes before the beginning of
usable SRAM. Still, it is technically a part of SRAM A2, so include it
in the memory definition. This avoids the confusing practice of
subtracting from the beginning of the SRAM region when referencing the
ARISC vectors.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Change-Id: Iae89e01aeab93560159562692e03e88306e2a1bf
This commit is contained in:
Samuel Holland 2019-02-17 15:10:36 -06:00
parent 98367c8061
commit ae3fe6e3e6
4 changed files with 8 additions and 8 deletions
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2
plat/allwinner/common/include/platform_def.h
View File

@ -13,7 +13,7 @@
#include <sunxi_mmap.h>
#define BL31_BASE SUNXI_SRAM_A2_BASE
#define BL31_BASE (SUNXI_SRAM_A2_BASE + 0x4000)
#define BL31_LIMIT (SUNXI_SRAM_A2_BASE + SUNXI_SRAM_A2_SIZE)
/* Overwrite U-Boot SPL, but reserve the first page for the SPL header. */

2
plat/allwinner/common/sunxi_common.c
View File

@ -175,7 +175,7 @@ DEFINE_BAKERY_LOCK(arisc_lock);
*/
void sunxi_execute_arisc_code(uint32_t *code, size_t size, uint16_t param)
{
uintptr_t arisc_reset_vec = SUNXI_SRAM_A2_BASE - 0x4000 + 0x100;
uintptr_t arisc_reset_vec = SUNXI_SRAM_A2_BASE + 0x100;
do {
bakery_lock_get(&arisc_lock);

6
plat/allwinner/sun50i_a64/include/sunxi_mmap.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -14,8 +14,8 @@
#define SUNXI_SRAM_SIZE 0x00044000
#define SUNXI_SRAM_A1_BASE 0x00010000
#define SUNXI_SRAM_A1_SIZE 0x00008000
#define SUNXI_SRAM_A2_BASE 0x00044000
#define SUNXI_SRAM_A2_SIZE 0x00010000
#define SUNXI_SRAM_A2_BASE 0x00040000
#define SUNXI_SRAM_A2_SIZE 0x00014000
#define SUNXI_SRAM_C_BASE 0x00018000
#define SUNXI_SRAM_C_SIZE 0x0001c000
#define SUNXI_DEV_BASE 0x01000000

6
plat/allwinner/sun50i_h6/include/sunxi_mmap.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -14,8 +14,8 @@
#define SUNXI_SRAM_SIZE 0x000f8000
#define SUNXI_SRAM_A1_BASE 0x00020000
#define SUNXI_SRAM_A1_SIZE 0x00008000
#define SUNXI_SRAM_A2_BASE 0x00104000
#define SUNXI_SRAM_A2_SIZE 0x00014000
#define SUNXI_SRAM_A2_BASE 0x00100000
#define SUNXI_SRAM_A2_SIZE 0x00018000
#define SUNXI_SRAM_C_BASE 0x00028000
#define SUNXI_SRAM_C_SIZE 0x0001e000
#define SUNXI_DEV_BASE 0x01000000