rockchip: rk3399: sperate the BL31 parameters for sharing
Maybe the coreboot will reference the BL31 parameters (e.g the TZRAM_BASE and TZRAM_SIZE for DDR secure regions), we can split them and don't have to hardcode the range in two places. Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
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@ -32,6 +32,7 @@
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#define __PLATFORM_DEF_H__
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#include <arch.h>
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#include <bl31_param.h>
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#include <common_def.h>
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#include <rk3399_def.h>
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@ -88,22 +89,6 @@
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*/
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#define PLAT_MAX_OFF_STATE 2
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/*******************************************************************************
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* Platform memory map related constants
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******************************************************************************/
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/* TF text, ro, rw, Size: 1MB */
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#define TZRAM_BASE (0x0)
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#define TZRAM_SIZE (0x100000)
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/*******************************************************************************
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* BL31 specific defines.
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******************************************************************************/
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/*
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* Put BL3-1 at the top of the Trusted RAM
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*/
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#define BL31_BASE (TZRAM_BASE + 0x1000)
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#define BL31_LIMIT (TZRAM_BASE + TZRAM_SIZE)
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/*******************************************************************************
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* Platform specific page table and MMU setup constants
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******************************************************************************/
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@ -0,0 +1,50 @@
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/*
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* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __PLAT_ROCKCHIP_RK3399_INCLUDE_SHARED_BL31_PARAM_H__
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#define __PLAT_ROCKCHIP_RK3399_INCLUDE_SHARED_BL31_PARAM_H__
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/*******************************************************************************
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* Platform memory map related constants
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******************************************************************************/
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/* TF text, ro, rw, Size: 1MB */
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#define TZRAM_BASE (0x0)
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#define TZRAM_SIZE (0x100000)
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/*******************************************************************************
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* BL31 specific defines.
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******************************************************************************/
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/*
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* Put BL3-1 at the top of the Trusted RAM
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*/
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#define BL31_BASE (TZRAM_BASE + 0x1000)
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#define BL31_LIMIT (TZRAM_BASE + TZRAM_SIZE)
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#endif /*__PLAT_ROCKCHIP_RK3399_INCLUDE_SHARED_BL31_PARAM_H__*/
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