fix(st-uart): correctly fill BRR register
To get the nearest divisor for BRR register, we use: Divisor = (Uart clock + (baudrate / 2)) / baudrate But lsl was wrongly used instead of lsr to have the division by 2. Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Change-Id: Iedcc3ccdb4cf8268012e82a66df2a9ec48fc1d79
This commit is contained in:
parent
b298d4df5e
commit
af7775ab53
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* Copyright (c) 2018-2021, ARM Limited and Contributors. All rights reserved.
|
||||
* Copyright (c) 2018-2022, ARM Limited and Contributors. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
|
@ -67,7 +67,7 @@ func console_stm32_core_init
|
|||
bic r3, r3, #USART_CR2_STOP
|
||||
str r3, [r0, #USART_CR2]
|
||||
/* Divisor = (Uart clock + (baudrate / 2)) / baudrate */
|
||||
lsl r3, r2, #1
|
||||
lsr r3, r2, #1
|
||||
add r3, r1, r3
|
||||
udiv r3, r3, r2
|
||||
str r3, [r0, #USART_BRR]
|
||||
|
|
Loading…
Reference in New Issue