From afac9681ff28d9a402b6622af94935300b42fbdf Mon Sep 17 00:00:00 2001 From: Hadi Asyrafi Date: Thu, 12 Sep 2019 15:14:01 +0800 Subject: [PATCH] intel: agilex: Fix psci power domain off Disable gic cpu interface for powered down cpu. This patch also removes core reset during power off as core reset will be done during power on Signed-off-by: Hadi Asyrafi Change-Id: I2ca96d876b6e71e56d24a9a7e184b6d6226b8673 --- plat/intel/soc/agilex/socfpga_psci.c | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-) diff --git a/plat/intel/soc/agilex/socfpga_psci.c b/plat/intel/soc/agilex/socfpga_psci.c index 04d8a0e91..12060ef08 100644 --- a/plat/intel/soc/agilex/socfpga_psci.c +++ b/plat/intel/soc/agilex/socfpga_psci.c @@ -61,18 +61,12 @@ int socfpga_pwr_domain_on(u_register_t mpidr) ******************************************************************************/ void socfpga_pwr_domain_off(const psci_power_state_t *target_state) { - unsigned int cpu_id = plat_my_core_pos(); - for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++) VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n", __func__, i, target_state->pwr_domain_state[i]); - /* TODO: Prevent interrupts from spuriously waking up this cpu */ - /* gicv2_cpuif_disable(); */ - - /* assert core reset */ - mmio_setbits_32(AGX_RSTMGR_OFST + AGX_RSTMGR_MPUMODRST_OFST, - 1 << cpu_id); + /* Prevent interrupts from spuriously waking up this cpu */ + gicv2_cpuif_disable(); } /*******************************************************************************