Merge "fix(intel): enable HPS QSPI access by default" into integration

This commit is contained in:
Madhukar Pappireddy 2022-02-28 16:37:06 +01:00 committed by TrustedFirmware Code Review
commit b5d2b4d532
4 changed files with 13 additions and 6 deletions

View File

@ -113,6 +113,9 @@ void bl2_el3_plat_arch_setup(void)
mmc_info.mmc_dev_type = MMC_IS_SD;
mmc_info.ocr_voltage = OCR_3_3_3_4 | OCR_3_2_3_3;
/* Request ownership and direct access to QSPI */
mailbox_hps_qspi_enable();
switch (boot_source) {
case BOOT_SOURCE_SDMMC:
dw_mmc_init(&params, &mmc_info);
@ -120,8 +123,6 @@ void bl2_el3_plat_arch_setup(void)
break;
case BOOT_SOURCE_QSPI:
mailbox_set_qspi_open();
mailbox_set_qspi_direct();
cad_qspi_init(0, QSPI_CONFIG_CPHA, QSPI_CONFIG_CPOL,
QSPI_CONFIG_CSDA, QSPI_CONFIG_CSDADS,
QSPI_CONFIG_CSEOT, QSPI_CONFIG_CSSOT, 0);

View File

@ -139,8 +139,7 @@
void mailbox_set_int(uint32_t interrupt_input);
int mailbox_init(void);
void mailbox_set_qspi_close(void);
void mailbox_set_qspi_open(void);
void mailbox_set_qspi_direct(void);
void mailbox_hps_qspi_enable(void);
int mailbox_send_cmd(uint32_t job_id, uint32_t cmd, uint32_t *args,
unsigned int len, uint32_t urgent, uint32_t *response,

View File

@ -393,6 +393,12 @@ void mailbox_qspi_set_cs(uint32_t device_select)
1U, CMD_CASUAL, NULL, 0U);
}
void mailbox_hps_qspi_enable(void)
{
mailbox_set_qspi_open();
mailbox_set_qspi_direct();
}
void mailbox_reset_cold(void)
{
mailbox_set_int(MBOX_INT_FLAG_COE | MBOX_INT_FLAG_RIE);

View File

@ -109,6 +109,9 @@ void bl2_el3_plat_arch_setup(void)
mmc_info.mmc_dev_type = MMC_IS_SD;
mmc_info.ocr_voltage = OCR_3_3_3_4 | OCR_3_2_3_3;
/* Request ownership and direct access to QSPI */
mailbox_hps_qspi_enable();
switch (boot_source) {
case BOOT_SOURCE_SDMMC:
dw_mmc_init(&params, &mmc_info);
@ -116,8 +119,6 @@ void bl2_el3_plat_arch_setup(void)
break;
case BOOT_SOURCE_QSPI:
mailbox_set_qspi_open();
mailbox_set_qspi_direct();
cad_qspi_init(0, QSPI_CONFIG_CPHA, QSPI_CONFIG_CPOL,
QSPI_CONFIG_CSDA, QSPI_CONFIG_CSDADS,
QSPI_CONFIG_CSEOT, QSPI_CONFIG_CSSOT, 0);