zynqmp: pm: Reimplement clock get parent EEMI API
Clock get parent EEMI API is reimplemented to use system-level clock and pll EEMI APIs rather than direct MMIO read/write accesses to clock and pll control registers. Since linux still uses clock set parent API to get pre_src, post_src, div2 and bypasss, in the implementation of pm_clock_get_parent() we need to workaround this by distinguishing two cases: 1) if the given clock ID corresponds to a PLL-related clock ID (*_PRE_SRC, *_POST_SRC, *_INT_MUX or *_PLL clock IDs); or 2) given clock ID is truly an on-chip clock. For case 1) we'll map the call onto PLL-specific EEMI API with the respective parameter ID. For case 2) the call is passed to the PMU. Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com> Acked-by: Will Wong <WILLW@xilinx.com> Signed-off-by: Jolly Shah <jollys@xilinx.com>
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@ -2710,51 +2710,36 @@ enum pm_ret_status pm_clock_pll_set_parent(struct pm_pll *pll,
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}
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/**
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* pm_api_clock_getparent - Get the clock parent for given id
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* @clock_id Id of the clock
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* @parent_idx parent index
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* pm_clock_pll_get_parent - Get mux select value of PLL-related clock parent
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* @pll Target PLL structure
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* @clock_id Id of the clock
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* @parent_index parent index (=mux select value)
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*
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* This function is used by master to get parent index
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* for any clock.
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* This function is used by master to get parent index for PLL-related clock.
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*
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* Return: Returns status, either success or error+reason.
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*/
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enum pm_ret_status pm_api_clock_getparent(unsigned int clock_id,
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unsigned int *parent_idx)
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enum pm_ret_status pm_clock_pll_get_parent(struct pm_pll *pll,
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enum clock_id clock_id,
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unsigned int *parent_index)
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{
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enum pm_ret_status ret = PM_RET_SUCCESS;
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struct pm_clock_node *nodes;
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uint8_t num_nodes;
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unsigned int reg, val;
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uint8_t i = 0, offset = NA_SHIFT, width = NA_WIDTH;
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if (!pm_clock_valid(clock_id))
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if (!pll)
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return PM_RET_ERROR_ARGS;
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if (pm_clock_type(clock_id) != CLK_TYPE_OUTPUT)
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return PM_RET_ERROR_NOTSUPPORTED;
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nodes = *clocks[clock_id].nodes;
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num_nodes = clocks[clock_id].num_nodes;
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for (i = 0; i < num_nodes; i++) {
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if (nodes->type == TYPE_MUX) {
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offset = nodes->offset;
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width = nodes->width;
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}
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nodes++;
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if (pll->pre_src == clock_id)
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return pm_pll_get_parameter(pll->nid, PM_PLL_PARAM_PRE_SRC,
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parent_index);
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if (pll->post_src == clock_id)
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return pm_pll_get_parameter(pll->nid, PM_PLL_PARAM_POST_SRC,
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parent_index);
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if (pll->div2 == clock_id)
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return pm_pll_get_parameter(pll->nid, PM_PLL_PARAM_DIV2,
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parent_index);
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if (pll->bypass == clock_id) {
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*parent_index = 0;
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return PM_RET_SUCCESS;
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}
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if (width == NA_WIDTH)
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return PM_RET_ERROR_NOTSUPPORTED;
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reg = clocks[clock_id].control_reg;
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ret = pm_mmio_read(reg, &val);
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val >>= offset;
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val &= ((1U << width) - 1);
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*parent_idx = val;
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return ret;
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return PM_RET_ERROR_ARGS;
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}
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/**
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@ -304,8 +304,9 @@ enum pm_ret_status pm_clock_pll_get_state(struct pm_pll *pll,
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enum pm_ret_status pm_clock_pll_set_parent(struct pm_pll *pll,
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enum clock_id clock_id,
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unsigned int parent_index);
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enum pm_ret_status pm_api_clock_getparent(unsigned int clock_id,
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unsigned int *parent_idx);
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enum pm_ret_status pm_clock_pll_get_parent(struct pm_pll *pll,
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enum clock_id clock_id,
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unsigned int *parent_index);
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enum pm_ret_status pm_clock_set_pll_mode(enum clock_id clock_id,
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unsigned int mode);
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enum pm_ret_status pm_clock_get_pll_mode(enum clock_id clock_id,
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@ -1113,7 +1113,7 @@ enum pm_ret_status pm_clock_setparent(unsigned int clock_id,
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/**
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* pm_clock_getparent - Get the clock parent for given id
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* @clock_id: Id of the clock
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* @parent_id: parent id
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* @parent_index: parent index
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*
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* This function is used by master to get parent index
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* for any clock.
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@ -1121,9 +1121,25 @@ enum pm_ret_status pm_clock_setparent(unsigned int clock_id,
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* Return: Returns status, either success or error+reason.
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*/
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enum pm_ret_status pm_clock_getparent(unsigned int clock_id,
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unsigned int *parent_id)
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unsigned int *parent_index)
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{
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return pm_api_clock_getparent(clock_id, parent_id);
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struct pm_pll *pll;
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uint32_t payload[PAYLOAD_ARG_CNT];
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enum pm_ret_status status;
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/* First try to handle it as a PLL */
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pll = pm_clock_get_pll_by_related_clk(clock_id);
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if (pll)
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return pm_clock_pll_get_parent(pll, clock_id, parent_index);
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/* Check if clock ID is a valid on-chip clock */
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status = pm_clock_id_is_valid(clock_id);
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if (status != PM_RET_SUCCESS)
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return status;
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/* Send request to the PMU */
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PM_PACK_PAYLOAD2(payload, PM_CLOCK_GETPARENT, clock_id);
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return pm_ipi_send_sync(primary_proc, payload, parent_index, 1);
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}
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/**
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