Add support for pointer authentication
The previous commit added the infrastructure to load and save ARMv8.3-PAuth registers during Non-secure <-> Secure world switches, but didn't actually enable pointer authentication in the firmware. This patch adds the functionality needed for platforms to provide authentication keys for the firmware, and a new option (ENABLE_PAUTH) to enable pointer authentication in the firmware itself. This option is disabled by default, and it requires CTX_INCLUDE_PAUTH_REGS to be enabled. Change-Id: I35127ec271e1198d43209044de39fa712ef202a5 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
This commit is contained in:
Antonio Nino Diaz
parent
5283962eba
commit
b86048c40c
19
Makefile
19
Makefile
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@ -184,6 +184,14 @@ TF_CFLAGS_aarch64 += -mgeneral-regs-only -mstrict-align
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ASFLAGS_aarch32 = $(march32-directive)
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ASFLAGS_aarch64 = -march=armv8-a
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# Set the compiler to ARMv8.3 mode so that it uses all the ARMv8.3-PAuth
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# instructions. Keeping it in 8.0 would make the compiler emit
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# backwards-compatible hint instructions, which needs more space.
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ifeq (${ENABLE_PAUTH},1)
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TF_CFLAGS_aarch64 += -march=armv8.3-a
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ASFLAGS_aarch64 += -march=armv8.3-a
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endif
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WARNING1 := -Wextra
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WARNING1 += -Wunused -Wno-unused-parameter
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WARNING1 += -Wmissing-declarations
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@ -459,6 +467,15 @@ ifeq ($(DYN_DISABLE_AUTH), 1)
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endif
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endif
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# If pointer authentication is used in the firmware, make sure that all the
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# registers associated to it are also saved and restored. Not doing it would
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# leak the value of the key used by EL3 to EL1 and S-EL1.
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ifeq ($(ENABLE_PAUTH),1)
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ifeq ($(CTX_INCLUDE_PAUTH_REGS),0)
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$(error ENABLE_PAUTH=1 requires CTX_INCLUDE_PAUTH_REGS=1)
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endif
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endif
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################################################################################
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# Process platform overrideable behaviour
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################################################################################
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@ -587,6 +604,7 @@ $(eval $(call assert_boolean,EL3_EXCEPTION_HANDLING))
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$(eval $(call assert_boolean,ENABLE_AMU))
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$(eval $(call assert_boolean,ENABLE_ASSERTIONS))
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$(eval $(call assert_boolean,ENABLE_MPAM_FOR_LOWER_ELS))
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$(eval $(call assert_boolean,ENABLE_PAUTH))
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$(eval $(call assert_boolean,ENABLE_PIE))
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$(eval $(call assert_boolean,ENABLE_PMF))
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$(eval $(call assert_boolean,ENABLE_PSCI_STAT))
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@ -639,6 +657,7 @@ $(eval $(call add_define,EL3_EXCEPTION_HANDLING))
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$(eval $(call add_define,ENABLE_AMU))
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$(eval $(call add_define,ENABLE_ASSERTIONS))
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$(eval $(call add_define,ENABLE_MPAM_FOR_LOWER_ELS))
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$(eval $(call add_define,ENABLE_PAUTH))
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$(eval $(call add_define,ENABLE_PIE))
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$(eval $(call add_define,ENABLE_PMF))
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$(eval $(call add_define,ENABLE_PSCI_STAT))
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@ -68,9 +68,13 @@ func enter_lower_el_sync_ea
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/* Save GP registers */
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bl save_gp_registers
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/* Save ARMv8.3-PAuth registers and load firmware key */
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#if CTX_INCLUDE_PAUTH_REGS
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bl pauth_context_save
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#endif
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#if ENABLE_PAUTH
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bl pauth_load_bl_apiakey
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#endif
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/* Setup exception class and syndrome arguments for platform handler */
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mov x0, #ERROR_EA_SYNC
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@ -102,9 +106,13 @@ func enter_lower_el_async_ea
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/* Save GP registers */
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bl save_gp_registers
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/* Save ARMv8.3-PAuth registers and load firmware key */
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#if CTX_INCLUDE_PAUTH_REGS
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bl pauth_context_save
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#endif
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#if ENABLE_PAUTH
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bl pauth_load_bl_apiakey
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#endif
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/* Setup exception class and syndrome arguments for platform handler */
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mov x0, #ERROR_EA_ASYNC
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@ -123,9 +123,13 @@
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bl save_gp_registers
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/* Save ARMv8.3-PAuth registers and load firmware key */
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#if CTX_INCLUDE_PAUTH_REGS
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bl pauth_context_save
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#endif
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#if ENABLE_PAUTH
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bl pauth_load_bl_apiakey
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#endif
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/* Save the EL3 system registers needed to return from this exception */
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mrs x0, spsr_el3
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@ -331,9 +335,13 @@ smc_handler64:
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/* Save general purpose registers */
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bl save_gp_registers
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/* Save ARMv8.3-PAuth registers and load firmware key */
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#if CTX_INCLUDE_PAUTH_REGS
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bl pauth_context_save
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#endif
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#if ENABLE_PAUTH
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bl pauth_load_bl_apiakey
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#endif
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/*
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* Populate the parameters for the SMC handler.
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -9,6 +9,7 @@
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#include <string.h>
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#include <arch.h>
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#include <arch_features.h>
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#include <arch_helpers.h>
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#include <common/bl_common.h>
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#include <common/debug.h>
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@ -243,3 +244,53 @@ void print_entry_point_info(const entry_point_info_t *ep_info)
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#endif
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#undef PRINT_IMAGE_ARG
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}
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#ifdef AARCH64
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/*******************************************************************************
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* Handle all possible cases regarding ARMv8.3-PAuth.
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******************************************************************************/
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void bl_handle_pauth(void)
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{
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#if ENABLE_PAUTH
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/*
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* ENABLE_PAUTH = 1 && CTX_INCLUDE_PAUTH_REGS = 1
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*
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* Check that the system supports address authentication to avoid
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* getting an access fault when accessing the registers. This is all
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* that is needed to check. If any of the authentication mechanisms is
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* supported, the system knows about ARMv8.3-PAuth, so all the registers
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* are available and accessing them won't generate a fault.
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*
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* Obtain 128-bit instruction key A from the platform and save it to the
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* system registers. Pointer authentication can't be enabled here or the
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* authentication will fail when returning from this function.
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*/
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assert(is_armv8_3_pauth_api_present());
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uint64_t *apiakey = plat_init_apiakey();
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write_apiakeylo_el1(apiakey[0]);
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write_apiakeyhi_el1(apiakey[1]);
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#else /* if !ENABLE_PAUTH */
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# if CTX_INCLUDE_PAUTH_REGS
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/*
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* ENABLE_PAUTH = 0 && CTX_INCLUDE_PAUTH_REGS = 1
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*
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* Assert that the ARMv8.3-PAuth registers are present or an access
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* fault will be triggered when they are being saved or restored.
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*/
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assert(is_armv8_3_pauth_present());
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# else
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/*
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* ENABLE_PAUTH = 0 && CTX_INCLUDE_PAUTH_REGS = 0
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*
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* Pointer authentication is allowed in the Non-secure world, but
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* prohibited in the Secure world. The Trusted Firmware doesn't save the
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* registers during a world switch. No check needed.
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*/
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# endif /* CTX_INCLUDE_PAUTH_REGS */
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#endif /* ENABLE_PAUTH */
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}
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#endif /* AARCH64 */
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@ -2566,6 +2566,11 @@ Armv8.3-A
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must be set to 1. This will add all pointer authentication system registers
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to the context that is saved when doing a world switch.
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The Trusted Firmware itself has support for pointer authentication at runtime
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that can be enabled by setting both options ``ENABLE_PAUTH`` and
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``CTX_INCLUDE_PAUTH_REGS`` to 1. This enables pointer authentication in BL1,
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BL2, BL31, and the TSP if it is used.
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Armv7-A
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~~~~~~~
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@ -1792,6 +1792,22 @@ defined by the translation library, and can be found in the file
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On DynamIQ systems, this function must not use stack while enabling MMU, which
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is how the function in xlat table library version 2 is implemented.
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Function : plat_init_apiakey [optional]
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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::
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Argument : void
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Return : uint64_t *
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This function populates the ``plat_apiakey`` array that contains the values used
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to set the ``APIAKey{Hi,Lo}_EL1`` registers. It returns a pointer to this array.
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The value should be obtained from a reliable source of randomness.
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This function is only needed if ARMv8.3 pointer authentication is used in the
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Trusted Firmware by building with ``ENABLE_PAUTH=1``.
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Function : plat_get_syscnt_freq2() [mandatory]
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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@ -362,7 +362,7 @@ Common build options
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the ARMv8.3-PAuth registers to be included when saving and restoring the CPU
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context. Note that if the hardware supports this extension and this option is
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set to 0 the value of the registers will be leaked between Secure and
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Non-secure worlds. The default is 0.
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Non-secure worlds if PAuth is used on both sides. The default is 0.
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- ``DEBUG``: Chooses between a debug and release build. It can take either 0
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(release) or 1 (debug) as values. 0 is the default.
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@ -411,6 +411,13 @@ Common build options
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partitioning in EL3, however. Platform initialisation code should configure
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and use partitions in EL3 as required. This option defaults to ``0``.
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- ``ENABLE_PAUTH``: Boolean option to enable ARMv8.3 Pointer Authentication
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(``ARMv8.3-PAuth``) support in the Trusted Firmware itself. Note that this
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option doesn't affect the saving of the registers introduced with this
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extension, they are always saved if they are detected regardless of the value
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of this option. If enabled, it is needed to use a compiler that supports the
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option ``-msign-return-address``. It defaults to 0.
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- ``ENABLE_PIE``: Boolean option to enable Position Independent Executable(PIE)
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support within generic code in TF-A. This option is currently only supported
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in BL31. Default is 0.
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@ -23,6 +23,23 @@ static inline bool is_armv8_2_ttcnp_present(void)
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ID_AA64MMFR2_EL1_CNP_MASK) != 0U;
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}
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static inline bool is_armv8_3_pauth_present(void)
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{
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uint64_t mask = (ID_AA64ISAR1_GPI_MASK << ID_AA64ISAR1_GPI_SHIFT) |
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(ID_AA64ISAR1_GPA_MASK << ID_AA64ISAR1_GPA_SHIFT) |
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(ID_AA64ISAR1_API_MASK << ID_AA64ISAR1_API_SHIFT) |
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(ID_AA64ISAR1_APA_MASK << ID_AA64ISAR1_APA_SHIFT);
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/* If any of the fields is not zero, PAuth is present */
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return (read_id_aa64isar1_el1() & mask) != 0U;
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}
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static inline bool is_armv8_3_pauth_api_present(void)
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{
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return ((read_id_aa64isar1_el1() >> ID_AA64ISAR1_API_SHIFT) &
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ID_AA64ISAR1_API_MASK) != 0U;
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}
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static inline bool is_armv8_4_ttst_present(void)
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{
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return ((read_id_aa64mmfr2_el1() >> ID_AA64MMFR2_EL1_ST_SHIFT) &
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@ -454,7 +454,8 @@ DEFINE_RENAME_SYSREG_READ_FUNC(erxmisc1_el1, ERXMISC1_EL1)
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DEFINE_RENAME_SYSREG_READ_FUNC(id_aa64mmfr2_el1, ID_AA64MMFR2_EL1)
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/* Armv8.3 Pointer Authentication Registers */
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DEFINE_RENAME_SYSREG_RW_FUNCS(apgakeylo_el1, APGAKeyLo_EL1)
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DEFINE_RENAME_SYSREG_RW_FUNCS(apiakeyhi_el1, APIAKeyHi_EL1)
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DEFINE_RENAME_SYSREG_RW_FUNCS(apiakeylo_el1, APIAKeyLo_EL1)
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#define IS_IN_EL(x) \
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(GET_EL(read_CurrentEl()) == MODE_EL##x)
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -207,6 +207,8 @@ struct mmap_region;
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void setup_page_tables(const struct mmap_region *bl_regions,
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const struct mmap_region *plat_regions);
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void bl_handle_pauth(void);
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#endif /*__ASSEMBLY__*/
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#endif /* BL_COMMON_H */
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -104,6 +104,7 @@ const char *plat_log_get_prefix(unsigned int log_level);
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void bl2_plat_preload_setup(void);
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int plat_try_next_boot_source(void);
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int plat_get_mbedtls_heap(void **heap_addr, size_t *heap_size);
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uint64_t *plat_init_apiakey(void);
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/*******************************************************************************
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* Mandatory BL1 functions
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@ -17,6 +17,9 @@
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#if CTX_INCLUDE_PAUTH_REGS
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.global pauth_context_restore
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.global pauth_context_save
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#endif
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#if ENABLE_PAUTH
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.global pauth_load_bl_apiakey
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#endif
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.global save_gp_registers
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.global restore_gp_registers
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@ -373,6 +376,26 @@ func pauth_context_restore
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endfunc pauth_context_restore
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#endif /* CTX_INCLUDE_PAUTH_REGS */
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/* -----------------------------------------------------
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* The following function strictly follows the AArch64
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* PCS to use x9-x17 (temporary caller-saved registers)
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* to load the APIA key used by the firmware.
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* -----------------------------------------------------
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*/
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#if ENABLE_PAUTH
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func pauth_load_bl_apiakey
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/* Load instruction key A used by the Trusted Firmware. */
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adrp x11, plat_apiakey
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add x11, x11, :lo12:plat_apiakey
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ldp x9, x10, [x11, #0]
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msr APIAKeyLo_EL1, x9
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msr APIAKeyHi_EL1, x10
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ret
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endfunc pauth_load_bl_apiakey
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#endif /* ENABLE_PAUTH */
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/* -----------------------------------------------------
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* The following functions are used to save and restore
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* all the general purpose registers. Ideally we would
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@ -87,6 +87,9 @@ ENABLE_STACK_PROTECTOR := 0
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# Flag to enable exception handling in EL3
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EL3_EXCEPTION_HANDLING := 0
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# Flag to enable Pointer Authentication
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ENABLE_PAUTH := 0
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# Build flag to treat usage of deprecated platform and framework APIs as error.
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ERROR_DEPRECATED := 0
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