Tegra: memctrl_v2: pack TZDRAM base to RSVD55_SCRATCH
This patch saves the TZDRAM_BASE value to secure RSVD55 scratch register. The warmboot code uses this register to restore the settings on exiting System Suspend. Change-Id: Id76175c2a7d931227589468511365599e2908411 Signed-off-by: Harvey Hsieh <hhsieh@nvidia.com>
This commit is contained in:
parent
7f9d75d236
commit
b886c7c5f4
|
@ -167,8 +167,6 @@ void tegra_memctrl_tzdram_setup(uint64_t phys_base, uint32_t size_in_bytes)
|
|||
*/
|
||||
|
||||
val = tegra_mc_read_32(MC_SECURITY_CFG1_0) & MC_SECURITY_SIZE_MB_MASK;
|
||||
mmio_write_32(TEGRA_SCRATCH_BASE + SECURE_SCRATCH_RSV54_HI, val);
|
||||
|
||||
val |= tegra_mc_read_32(MC_SECURITY_CFG0_0) & MC_SECURITY_BOM_MASK;
|
||||
mmio_write_32(TEGRA_SCRATCH_BASE + SECURE_SCRATCH_RSV55_LO, val);
|
||||
|
||||
|
|
|
@ -232,7 +232,6 @@
|
|||
#define SECURE_SCRATCH_RSV11_HI U(0x6AC)
|
||||
#define SECURE_SCRATCH_RSV53_LO U(0x7F8)
|
||||
#define SECURE_SCRATCH_RSV53_HI U(0x7FC)
|
||||
#define SECURE_SCRATCH_RSV54_HI U(0x804)
|
||||
#define SECURE_SCRATCH_RSV55_LO U(0x808)
|
||||
#define SECURE_SCRATCH_RSV55_HI U(0x80C)
|
||||
|
||||
|
|
Loading…
Reference in New Issue