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drivers: renesas: common: Add support for DRAM initialization on RZ/G2N SoC 

Add support for initializing DRAM on RZ/G2N SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Change-Id: Id09a367b92b11a5da88f2dce6887677cc935d0c0
This commit is contained in:
Lad Prabhakar 2021-04-19 17:03:56 +01:00
parent ec3e2f6719
commit b939cbbb8d
3 changed files with 39 additions and 3 deletions
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3
drivers/renesas/common/ddr/ddr_b/boot_init_dram.c
View File

@ -38,6 +38,7 @@
#define RZ_G2M 100U #define RZ_G2M 100U
#define RZ_G2H 101U #define RZ_G2H 101U
#define RZ_G2N 102U
#define RCAR_CUT_10 0 #define RCAR_CUT_10 0
#define RCAR_CUT_11 1 #define RCAR_CUT_11 1
@ -56,7 +57,7 @@ static uint32_t prr_cut;
static const uint32_t prr_product = PRR_PRODUCT_H3; static const uint32_t prr_product = PRR_PRODUCT_H3;
#elif(RCAR_LSI == RCAR_M3 || RCAR_LSI == RZ_G2M) #elif(RCAR_LSI == RCAR_M3 || RCAR_LSI == RZ_G2M)
static const uint32_t prr_product = PRR_PRODUCT_M3; static const uint32_t prr_product = PRR_PRODUCT_M3;
#elif(RCAR_LSI == RCAR_M3N) #elif(RCAR_LSI == RCAR_M3N || RCAR_LSI == RZ_G2N)
static const uint32_t prr_product = PRR_PRODUCT_M3N; static const uint32_t prr_product = PRR_PRODUCT_M3N;
#elif(RCAR_LSI == RCAR_H3N || RCAR_LSI == RZ_G2H) #elif(RCAR_LSI == RCAR_H3N || RCAR_LSI == RZ_G2H)
static const uint32_t prr_product = PRR_PRODUCT_H3; static const uint32_t prr_product = PRR_PRODUCT_H3;

37
drivers/renesas/common/ddr/ddr_b/boot_init_dram_config.c
View File

@ -10,7 +10,7 @@
#endif #endif
#if (RZG_SOC == 1) #if (RZG_SOC == 1)
#define BOARDNUM 3 #define BOARDNUM 4
#else #else
#define BOARDNUM 22 #define BOARDNUM 22
#endif /* RZG_SOC == 1 */ #endif /* RZG_SOC == 1 */
@ -260,7 +260,37 @@ static const struct _boardcnf boardcnfs[BOARDNUM] = {
0, 0, 0, 0, 0, 0, 0, 0 } 0, 0, 0, 0, 0, 0, 0, 0 }
} }
} }
} },
/* boardcnf[3] HopeRun HiHope RZ/G2N board 16Gbit/2rank/1ch */
{
0x01U,
0x01U,
0x0300U,
0,
0x0300U,
0x00a0U,
{
{
{ 0x04U, 0x04U },
0x00345201UL,
0x3201U,
{ 0x01672543U, 0x45361207U, 0x45632107U, 0x60715234U },
{ 0x08U, 0x08U, 0x08U, 0x08U },
WDQLVL_PAT,
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
{ 0, 0, 0, 0 },
{ 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0 },
{ 0, 0, 0, 0 },
{ 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0 }
}
}
},
}; };
#else #else
static const struct _boardcnf boardcnfs[BOARDNUM] = { static const struct _boardcnf boardcnfs[BOARDNUM] = {
@ -1926,6 +1956,9 @@ static uint32_t rzg2_board_judge(void)
case PRR_PRODUCT_H3: case PRR_PRODUCT_H3:
brd = 2U; brd = 2U;
break; break;
case PRR_PRODUCT_M3N:
brd = 3U;
break;
default: default:
brd = 99U; brd = 99U;
} }

2
plat/renesas/common/common.mk
View File

@ -35,6 +35,7 @@ RCAR_V3M:=6
RCAR_AUTO:=99 RCAR_AUTO:=99
RZ_G2M:=100 RZ_G2M:=100
RZ_G2H:=101 RZ_G2H:=101
RZ_G2N:=102
$(eval $(call add_define,RCAR_H3)) $(eval $(call add_define,RCAR_H3))
$(eval $(call add_define,RCAR_M3)) $(eval $(call add_define,RCAR_M3))
$(eval $(call add_define,RCAR_M3N)) $(eval $(call add_define,RCAR_M3N))
@ -45,6 +46,7 @@ $(eval $(call add_define,RCAR_V3M))
$(eval $(call add_define,RCAR_AUTO)) $(eval $(call add_define,RCAR_AUTO))
$(eval $(call add_define,RZ_G2M)) $(eval $(call add_define,RZ_G2M))
$(eval $(call add_define,RZ_G2H)) $(eval $(call add_define,RZ_G2H))
$(eval $(call add_define,RZ_G2N))
RCAR_CUT_10:=0 RCAR_CUT_10:=0
RCAR_CUT_11:=1 RCAR_CUT_11:=1