From bc0a0bea5295716b33cc29f49ae6698357918886 Mon Sep 17 00:00:00 2001 From: Varun Wadekar Date: Tue, 28 Feb 2017 08:23:59 -0800 Subject: [PATCH] Tegra: enable SEPARATE_CODE_AND_RODATA build flag This patch enables the SEPARATE_CODE_AND_RODATA build flag for all Tegra platforms, to allow setting proper MMU attributes for the RO data and the code. Signed-off-by: Varun Wadekar --- plat/nvidia/tegra/common/tegra_bl31_setup.c | 40 +++++++++++++-------- plat/nvidia/tegra/common/tegra_common.mk | 2 ++ 2 files changed, 27 insertions(+), 15 deletions(-) diff --git a/plat/nvidia/tegra/common/tegra_bl31_setup.c b/plat/nvidia/tegra/common/tegra_bl31_setup.c index c499c991c..9e7e576c2 100644 --- a/plat/nvidia/tegra/common/tegra_bl31_setup.c +++ b/plat/nvidia/tegra/common/tegra_bl31_setup.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: @@ -54,8 +54,12 @@ extern void zeromem16(void *mem, unsigned int length); * Declarations of linker defined symbols which will help us find the layout * of trusted SRAM ******************************************************************************/ -extern unsigned long __RO_START__; -extern unsigned long __RO_END__; +extern unsigned long __TEXT_START__; +extern unsigned long __TEXT_END__; +extern unsigned long __RW_START__; +extern unsigned long __RW_END__; +extern unsigned long __RODATA_START__; +extern unsigned long __RODATA_END__; extern unsigned long __BL31_END__; extern uint64_t tegra_bl31_phys_base; @@ -68,8 +72,10 @@ extern uint64_t tegra_console_base; * script to ensure that __RO_START__, __RO_END__ & __BL31_END__ linker symbols * refer to page-aligned addresses. */ -#define BL31_RO_BASE (unsigned long)(&__RO_START__) -#define BL31_RO_LIMIT (unsigned long)(&__RO_END__) +#define BL31_RW_START (unsigned long)(&__RW_START__) +#define BL31_RW_END (unsigned long)(&__RW_END__) +#define BL31_RODATA_BASE (unsigned long)(&__RODATA_START__) +#define BL31_RODATA_END (unsigned long)(&__RODATA_END__) #define BL31_END (unsigned long)(&__BL31_END__) static entry_point_info_t bl33_image_ep_info, bl32_image_ep_info; @@ -302,11 +308,12 @@ void bl31_plat_runtime_setup(void) ******************************************************************************/ void bl31_plat_arch_setup(void) { - unsigned long bl31_base_pa = tegra_bl31_phys_base; - unsigned long total_base = bl31_base_pa; - unsigned long total_size = BL32_BASE - BL31_RO_BASE; - unsigned long ro_start = bl31_base_pa; - unsigned long ro_size = BL31_RO_LIMIT - BL31_RO_BASE; + unsigned long rw_start = BL31_RW_START; + unsigned long rw_size = BL31_RW_END - BL31_RW_START; + unsigned long rodata_start = BL31_RODATA_BASE; + unsigned long rodata_size = BL31_RODATA_END - BL31_RODATA_BASE; + unsigned long code_base = (unsigned long)(&__TEXT_START__); + unsigned long code_size = (unsigned long)(&__TEXT_END__) - code_base; const mmap_region_t *plat_mmio_map = NULL; #if USE_COHERENT_MEM unsigned long coh_start, coh_size; @@ -314,12 +321,15 @@ void bl31_plat_arch_setup(void) plat_params_from_bl2_t *params_from_bl2 = bl31_get_plat_params(); /* add memory regions */ - mmap_add_region(total_base, total_base, - total_size, + mmap_add_region(rw_start, rw_start, + rw_size, MT_MEMORY | MT_RW | MT_SECURE); - mmap_add_region(ro_start, ro_start, - ro_size, - MT_MEMORY | MT_RO | MT_SECURE); + mmap_add_region(rodata_start, rodata_start, + rodata_size, + MT_RO_DATA | MT_SECURE); + mmap_add_region(code_base, code_base, + code_size, + MT_CODE | MT_SECURE); /* map TZDRAM used by BL31 as coherent memory */ if (TEGRA_TZRAM_BASE == tegra_bl31_phys_base) { diff --git a/plat/nvidia/tegra/common/tegra_common.mk b/plat/nvidia/tegra/common/tegra_common.mk index 92024e9fa..3617396af 100644 --- a/plat/nvidia/tegra/common/tegra_common.mk +++ b/plat/nvidia/tegra/common/tegra_common.mk @@ -36,6 +36,8 @@ $(eval $(call add_define,ASM_ASSERTION)) USE_COHERENT_MEM := 0 +SEPARATE_CODE_AND_RODATA := 1 + PLAT_INCLUDES := -Iplat/nvidia/tegra/include/drivers \ -Iplat/nvidia/tegra/include \ -Iplat/nvidia/tegra/include/${TARGET_SOC}