fix(mt8186): remove unused files in drivers/mcdi
We don't use mbox drivers which are implemented in these files for mcdi, so remove related files from mcdi folder. TEST=build pass BUG=b:202871018 Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com> Change-Id: Idea5ebe5b25f91066ebd653cdcdafe65ca292b0f
This commit is contained in:
Rex-BC Chen
parent
a006606f3c
commit
bc714bafe7
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@ -1,31 +0,0 @@
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#
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# Copyright (c) 2021, MediaTek Inc. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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MCDI_TINYSYS_TYPE = sspm
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MCDI_TINYSYS_MBOX_TYPE = share_sram
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CUR_MCDI_FOLDER = ${MTK_PLAT_SOC}/drivers/mcdi
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BL31_MT_LPM_PLAT_CFLAGS += -I${CUR_MCDI_FOLDER}/
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BL31_MT_LPM_PLAT_SOURCE += \
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${CUR_MCDI_FOLDER}/mt_cpu_pm.c \
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${CUR_MCDI_FOLDER}/mt_cpu_pm_cpc.c \
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${CUR_MCDI_FOLDER}/mt_mcdi.c \
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${CUR_MCDI_FOLDER}/mt_lp_irqremain.c
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ifeq ($(MCDI_TINYSYS_TYPE), sspm)
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BL31_MT_LPM_PLAT_CFLAGS += -DMCDI_TINYSYS_SSPM
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BL31_MT_LPM_PLAT_SOURCE += ${CUR_MCDI_FOLDER}/mt_cpu_pm_mbox_sspm.c
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else
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BL31_MT_LPM_PLAT_CFLAGS += -DMCDI_TINYSYS_MCUPM
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BL31_MT_LPM_PLAT_SOURCE += ${CUR_MCDI_FOLDER}/mt_cpu_pm_mbox.c
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endif
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ifeq ($(MCDI_TINYSYS_MBOX_TYPE), share_sram)
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BL31_MT_LPM_PLAT_CFLAGS += -DMCDI_TINYSYS_MBOX_SHARE_SRAM
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endif
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@ -1,79 +0,0 @@
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/*
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* Copyright (c) 2021, MediaTek Inc. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <mmio.h>
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#include <mt_cpu_pm_mbox.h>
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#include <platform_def.h>
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#include <sspm_reg.h>
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#define MCUPM_MBOX_3_BASE (MTK_MCUPM_SRAM_BASE + 0xFCE0)
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#define _sspm_mbox_write(id, val) \
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mmio_write_32(SSPM_MBOX_3_BASE + 4 * (id), val)
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#define _sspm_mbox_read(id) \
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mmio_read_32(SSPM_MBOX_3_BASE + 4 * (id))
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#define _mcupm_mbox_write(id, val) \
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mmio_write_32(MCUPM_MBOX_3_BASE + 4 * (id), val)
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#define _mcupm_mbox_read(id) \
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mmio_read_32(MCUPM_MBOX_3_BASE + 4 * (id))
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#define MCUPM_MBOX_OFFSET_PDN (0x0C55FDA8)
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#define MCUPM_POWER_DOWN (0x4D50444E)
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void mtk_set_sspm_lp_cmd(void *buf, unsigned int size)
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{
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unsigned int *p = (unsigned int *)buf;
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int i;
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for (i = 0; i < size; i++) {
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_sspm_mbox_write(SSPM_MBOX_SPM_CMD + i, p[i]);
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}
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}
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void mtk_clr_sspm_lp_cmd(unsigned int size)
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{
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int i;
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for (i = 0; i < size; i++) {
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_sspm_mbox_write(SSPM_MBOX_SPM_CMD + i, 0);
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}
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}
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void mtk_set_cpu_pm_pll_mode(unsigned int mode)
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{
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if (mode < NF_MCUPM_ARMPLL_MODE) {
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_mcupm_mbox_write(MCUPM_MBOX_ARMPLL_MODE, mode);
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}
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}
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int mtk_get_cpu_pm_pll_mode(void)
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{
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return _mcupm_mbox_read(MCUPM_MBOX_ARMPLL_MODE);
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}
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void mtk_set_cpu_pm_buck_mode(unsigned int mode)
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{
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if (mode < NF_MCUPM_BUCK_MODE) {
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_mcupm_mbox_write(MCUPM_MBOX_BUCK_MODE, mode);
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}
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}
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int mtk_get_cpu_pm_buck_mode(void)
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{
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return _mcupm_mbox_read(MCUPM_MBOX_BUCK_MODE);
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}
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void mtk_set_cpu_pm_preffered_cpu(unsigned int cpuid)
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{
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return _mcupm_mbox_read(MCUPM_MBOX_WAKEUP_CPU);
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}
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int mtk_set_cpu_pm_mbox_addr(uint64_t phy_addr)
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{
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return 0;
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}
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@ -1,83 +0,0 @@
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/*
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* Copyright (c) 2021, MediaTek Inc. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef __MT_CPU_PM_MBOX_H__
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#define __MT_CPU_PM_MBOX_H__
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/* SSPM Mbox */
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/* AP Write */
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#define SSPM_MBOX_SPM_CMD (0U)
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#define SSPM_MBOX_SPM_ARGS1 (1U)
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#define SSPM_MBOX_SPM_ARGS2 (2U)
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#define SSPM_MBOX_SPM_ARGS3 (3U)
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#define SSPM_MBOX_SPM_ARGS4 (4U)
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#define SSPM_MBOX_SPM_ARGS5 (5U)
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#define SSPM_MBOX_SPM_ARGS6 (6U)
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#define SSPM_MBOX_SPM_ARGS7 (7U)
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#define SSPM_MBOX_AP_READY (17U)
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#define SSPM_MBOX_SPM_CMD_SIZE (8U)
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void mtk_set_sspm_lp_cmd(void *buf, unsigned int size);
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void mtk_clr_sspm_lp_cmd(unsigned int size);
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/* MCUPM Mbox */
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/* AP Write */
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#define MCUPM_MBOX_AP_READY (0U)
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#define MCUPM_MBOX_RESERVED_1 (1U)
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#define MCUPM_MBOX_RESERVED_2 (2U)
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#define MCUPM_MBOX_RESERVED_3 (3U)
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#define MCUPM_MBOX_PWR_CTRL_EN (4U)
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#define MCUPM_MBOX_L3_CACHE_MODE (5U)
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#define MCUPM_MBOX_BUCK_MODE (6U)
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#define MCUPM_MBOX_ARMPLL_MODE (7U)
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/* AP Read */
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#define MCUPM_MBOX_TASK_STA (8U)
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#define MCUPM_MBOX_RESERVED_9 (9U)
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#define MCUPM_MBOX_RESERVED_10 (10U)
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#define MCUPM_MBOX_RESERVED_11 (11U)
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/* CPC mode - Read/Write */
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#define MCUPM_MBOX_WAKEUP_CPU (12U)
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/* Mbox Slot: APMCU_MCUPM_MBOX_PWR_CTRL_EN (4) */
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#define MCUPM_MCUSYS_CTRL (1U << 0)
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#define MCUPM_BUCK_CTRL (1U << 1)
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#define MCUPM_ARMPLL_CTRL (1U << 2)
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#define MCUPM_PWR_CTRL_MASK ((1U << 3) - 1U)
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/* Mbox Slot: APMCU_MCUPM_MBOX_L3_CACHE_MODE (5) */
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#define MCUPM_L3_OFF_MODE (0U) /* default */
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#define MCUPM_L3_DORMANT_MODE (1U)
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#define NF_MCUPM_L3_MODE (2U)
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/* Mbox Slot: APMCU_MCUPM_MBOX_BUCK_MODE (6) */
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#define MCUPM_BUCK_NORMAL_MODE (0U) /* default */
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#define MCUPM_BUCK_LP_MODE (1U)
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#define MCUPM_BUCK_OFF_MODE (2U)
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#define NF_MCUPM_BUCK_MODE (3U)
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/* Mbox Slot: APMCU_MCUPM_MBOX_ARMPLL_MODE (7) */
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#define MCUPM_ARMPLL_ON (0U) /* default */
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#define MCUPM_ARMPLL_GATING (1U)
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#define MCUPM_ARMPLL_OFF (2U)
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#define NF_MCUPM_ARMPLL_MODE (3U)
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/* Mbox Slot: APMCU_MCUPM_MBOX_TASK_STA (9) */
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#define MCUPM_TASK_UNINIT (0U)
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#define MCUPM_TASK_INIT (1U)
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#define MCUPM_TASK_INIT_FINISH (2U)
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#define MCUPM_TASK_WAIT (3U)
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#define MCUPM_TASK_RUN (4U)
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#define MCUPM_TASK_PAUSE (5U)
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void mtk_set_cpu_pm_pll_mode(unsigned int mode);
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int mtk_get_cpu_pm_pll_mode(void);
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void mtk_set_cpu_pm_buck_mode(unsigned int mode);
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int mtk_get_cpu_pm_buck_mode(void);
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void mtk_set_cpu_pm_preffered_cpu(unsigned int cpuid);
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int mtk_set_cpu_pm_mbox_addr(uint64_t phy_addr);
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#endif
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@ -1,90 +0,0 @@
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/*
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* Copyright (c) 2021, MediaTek Inc. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <mmio.h>
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#include <mt_cpu_pm.h>
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#include <mt_cpu_pm_mbox.h>
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#include <platform_def.h>
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#include <sspm_reg.h>
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#ifdef MCDI_TINYSYS_MBOX_SHARE_SRAM
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struct cpu_pm_mbox {
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unsigned int ap_ready;
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unsigned int reserved1;
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unsigned int reserved2;
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unsigned int reserved3;
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unsigned int pwr_ctrl_en;
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unsigned int l3_cache_mode;
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unsigned int buck_mode;
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unsigned int armpll_mode;
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unsigned int task_sta;
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unsigned int reserved9;
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unsigned int reserved10;
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unsigned int reserved11;
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unsigned int wakeup_cpu;
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};
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struct cpu_pm_mbox *_cpu_pm_box = (struct cpu_pm_mbox *)SSPM_MBOX_3_BASE;
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#endif
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void mtk_set_cpu_pm_pll_mode(unsigned int mode)
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{
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#ifdef MCDI_TINYSYS_MBOX_SHARE_SRAM
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if (_cpu_pm_box) {
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_cpu_pm_box->armpll_mode = mode;
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}
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#endif
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}
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int mtk_get_cpu_pm_pll_mode(void)
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{
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#ifdef MCDI_TINYSYS_MBOX_SHARE_SRAM
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if (!_cpu_pm_box) {
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return 0;
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}
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return _cpu_pm_box->armpll_mode;
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#endif
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}
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void mtk_set_cpu_pm_buck_mode(unsigned int mode)
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{
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#ifdef MCDI_TINYSYS_MBOX_SHARE_SRAM
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if (_cpu_pm_box) {
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_cpu_pm_box->buck_mode = mode;
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}
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#endif
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}
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int mtk_get_cpu_pm_buck_mode(void)
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{
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#ifdef MCDI_TINYSYS_MBOX_SHARE_SRAM
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if (!_cpu_pm_box) {
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return 0;
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}
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return _cpu_pm_box->buck_mode;
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#endif
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}
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void mtk_set_cpu_pm_preffered_cpu(unsigned int cpuid)
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{
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#ifdef MCDI_TINYSYS_MBOX_SHARE_SRAM
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if (_cpu_pm_box) {
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_cpu_pm_box->wakeup_cpu = cpuid;
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}
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#endif
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}
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int mtk_set_cpu_pm_mbox_addr(uint64_t phy_addr)
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{
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#ifdef MCDI_TINYSYS_MBOX_SHARE_SRAM
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if (_cpu_pm_box || (phy_addr == 0)) {
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return -1;
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}
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_cpu_pm_box = (struct cpu_pm_mbox *)(MTK_SSPM_BASE + phy_addr);
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#endif
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return 0;
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}
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