From 5e96139f78dbb64b65537a1d24aacecb8a0264d4 Mon Sep 17 00:00:00 2001 From: Antonio Nino Diaz Date: Fri, 23 Nov 2018 13:54:00 +0000 Subject: [PATCH 1/3] Move helpers from arch.h to arch_helpers.h Some of the affected macros can only be used from C code. In general, we use arch_helpers.h for any C helpers to access registers. For consistency, the other macros have been moved as well. Also, import some AArch32 helpers from TF-A-Tests. Change-Id: Ie8fe1ddeadba5336c12971ddc39a7883121386b1 Signed-off-by: Antonio Nino Diaz --- include/lib/aarch32/arch_helpers.h | 13 +++++++++++++ include/lib/aarch64/arch.h | 13 ------------- include/lib/aarch64/arch_helpers.h | 13 +++++++++++++ 3 files changed, 26 insertions(+), 13 deletions(-) diff --git a/include/lib/aarch32/arch_helpers.h b/include/lib/aarch32/arch_helpers.h index 7d1944cae..30e0584db 100644 --- a/include/lib/aarch32/arch_helpers.h +++ b/include/lib/aarch32/arch_helpers.h @@ -248,6 +248,19 @@ DEFINE_COPROCR_RW_FUNCS(cnthp_ctl_el2, CNTHP_CTL) DEFINE_COPROCR_RW_FUNCS(cnthp_tval_el2, CNTHP_TVAL) DEFINE_COPROCR_RW_FUNCS_64(cnthp_cval_el2, CNTHP_CVAL_64) +#define get_cntp_ctl_enable(x) (((x) >> CNTP_CTL_ENABLE_SHIFT) & \ + CNTP_CTL_ENABLE_MASK) +#define get_cntp_ctl_imask(x) (((x) >> CNTP_CTL_IMASK_SHIFT) & \ + CNTP_CTL_IMASK_MASK) +#define get_cntp_ctl_istatus(x) (((x) >> CNTP_CTL_ISTATUS_SHIFT) & \ + CNTP_CTL_ISTATUS_MASK) + +#define set_cntp_ctl_enable(x) ((x) |= U(1) << CNTP_CTL_ENABLE_SHIFT) +#define set_cntp_ctl_imask(x) ((x) |= U(1) << CNTP_CTL_IMASK_SHIFT) + +#define clr_cntp_ctl_enable(x) ((x) &= ~(U(1) << CNTP_CTL_ENABLE_SHIFT)) +#define clr_cntp_ctl_imask(x) ((x) &= ~(U(1) << CNTP_CTL_IMASK_SHIFT)) + DEFINE_COPROCR_RW_FUNCS(icc_sre_el1, ICC_SRE) DEFINE_COPROCR_RW_FUNCS(icc_sre_el2, ICC_HSRE) DEFINE_COPROCR_RW_FUNCS(icc_sre_el3, ICC_MSRE) diff --git a/include/lib/aarch64/arch.h b/include/lib/aarch64/arch.h index 97595e9a2..6f81e1b41 100644 --- a/include/lib/aarch64/arch.h +++ b/include/lib/aarch64/arch.h @@ -534,19 +534,6 @@ #define CNTP_CTL_IMASK_MASK U(1) #define CNTP_CTL_ISTATUS_MASK U(1) -#define get_cntp_ctl_enable(x) (((x) >> CNTP_CTL_ENABLE_SHIFT) & \ - CNTP_CTL_ENABLE_MASK) -#define get_cntp_ctl_imask(x) (((x) >> CNTP_CTL_IMASK_SHIFT) & \ - CNTP_CTL_IMASK_MASK) -#define get_cntp_ctl_istatus(x) (((x) >> CNTP_CTL_ISTATUS_SHIFT) & \ - CNTP_CTL_ISTATUS_MASK) - -#define set_cntp_ctl_enable(x) ((x) |= (U(1) << CNTP_CTL_ENABLE_SHIFT)) -#define set_cntp_ctl_imask(x) ((x) |= (U(1) << CNTP_CTL_IMASK_SHIFT)) - -#define clr_cntp_ctl_enable(x) ((x) &= ~(U(1) << CNTP_CTL_ENABLE_SHIFT)) -#define clr_cntp_ctl_imask(x) ((x) &= ~(U(1) << CNTP_CTL_IMASK_SHIFT)) - /* Exception Syndrome register bits and bobs */ #define ESR_EC_SHIFT U(26) #define ESR_EC_MASK U(0x3f) diff --git a/include/lib/aarch64/arch_helpers.h b/include/lib/aarch64/arch_helpers.h index 8b3d53a48..47084bc5b 100644 --- a/include/lib/aarch64/arch_helpers.h +++ b/include/lib/aarch64/arch_helpers.h @@ -306,6 +306,19 @@ DEFINE_SYSREG_RW_FUNCS(cntp_cval_el0) DEFINE_SYSREG_READ_FUNC(cntpct_el0) DEFINE_SYSREG_RW_FUNCS(cnthctl_el2) +#define get_cntp_ctl_enable(x) (((x) >> CNTP_CTL_ENABLE_SHIFT) & \ + CNTP_CTL_ENABLE_MASK) +#define get_cntp_ctl_imask(x) (((x) >> CNTP_CTL_IMASK_SHIFT) & \ + CNTP_CTL_IMASK_MASK) +#define get_cntp_ctl_istatus(x) (((x) >> CNTP_CTL_ISTATUS_SHIFT) & \ + CNTP_CTL_ISTATUS_MASK) + +#define set_cntp_ctl_enable(x) ((x) |= (U(1) << CNTP_CTL_ENABLE_SHIFT)) +#define set_cntp_ctl_imask(x) ((x) |= (U(1) << CNTP_CTL_IMASK_SHIFT)) + +#define clr_cntp_ctl_enable(x) ((x) &= ~(U(1) << CNTP_CTL_ENABLE_SHIFT)) +#define clr_cntp_ctl_imask(x) ((x) &= ~(U(1) << CNTP_CTL_IMASK_SHIFT)) + DEFINE_SYSREG_RW_FUNCS(tpidr_el3) DEFINE_SYSREG_RW_FUNCS(cntvoff_el2) From fdbc29344ad1a90d7afe148d888ca27fab1c31b1 Mon Sep 17 00:00:00 2001 From: Antonio Nino Diaz Date: Fri, 23 Nov 2018 13:54:41 +0000 Subject: [PATCH 2/3] Deprecate some unused AArch64 assembly functions Change-Id: I8a0be21783a0c12325e6ab22e9e53ab5466ed9e0 Signed-off-by: Antonio Nino Diaz --- include/lib/aarch64/arch_helpers.h | 2 ++ lib/aarch64/misc_helpers.S | 5 ++++- 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/include/lib/aarch64/arch_helpers.h b/include/lib/aarch64/arch_helpers.h index 47084bc5b..92b16fc8d 100644 --- a/include/lib/aarch64/arch_helpers.h +++ b/include/lib/aarch64/arch_helpers.h @@ -215,11 +215,13 @@ DEFINE_SYSOP_TYPE_FUNC(dmb, ishst) DEFINE_SYSOP_TYPE_FUNC(dmb, ish) DEFINE_SYSOP_FUNC(isb) +#if !ERROR_DEPRECATED uint32_t get_afflvl_shift(uint32_t); uint32_t mpidr_mask_lower_afflvls(uint64_t, uint32_t); void __dead2 eret(uint64_t x0, uint64_t x1, uint64_t x2, uint64_t x3, uint64_t x4, uint64_t x5, uint64_t x6, uint64_t x7); +#endif void __dead2 smc(uint64_t x0, uint64_t x1, uint64_t x2, uint64_t x3, uint64_t x4, uint64_t x5, uint64_t x6, uint64_t x7); diff --git a/lib/aarch64/misc_helpers.S b/lib/aarch64/misc_helpers.S index 002942e8d..8920f7297 100644 --- a/lib/aarch64/misc_helpers.S +++ b/lib/aarch64/misc_helpers.S @@ -9,9 +9,11 @@ #include #include +#if !ERROR_DEPRECATED .globl get_afflvl_shift .globl mpidr_mask_lower_afflvls .globl eret +#endif /* ERROR_DEPRECATED */ .globl smc .globl zero_normalmem @@ -30,6 +32,7 @@ .globl enable_vfp #endif +#if !ERROR_DEPRECATED func get_afflvl_shift cmp x0, #3 cinc x0, x0, eq @@ -52,7 +55,7 @@ endfunc mpidr_mask_lower_afflvls func eret eret endfunc eret - +#endif /* ERROR_DEPRECATED */ func smc smc #0 From b4474fabe850cb75eeb895a3d7eff6b68e6ab072 Mon Sep 17 00:00:00 2001 From: Antonio Nino Diaz Date: Fri, 23 Nov 2018 15:04:01 +0000 Subject: [PATCH 3/3] Import exception helpers from TF-A-Tests This is done in order to keep the files in both repositories in sync. Change-Id: Ie1a9f321cbcfe8d7d14f206883fa718872271218 Signed-off-by: Antonio Nino Diaz --- include/lib/aarch32/arch_helpers.h | 55 ++++++++++++++++++++++++ include/lib/aarch64/arch_helpers.h | 68 ++++++++++++++++++++++++++++++ 2 files changed, 123 insertions(+) diff --git a/include/lib/aarch32/arch_helpers.h b/include/lib/aarch32/arch_helpers.h index 30e0584db..a6fe14fb8 100644 --- a/include/lib/aarch32/arch_helpers.h +++ b/include/lib/aarch32/arch_helpers.h @@ -391,4 +391,59 @@ static inline unsigned int get_current_el(void) #define read_amcntenset0_el0() read_amcntenset0() #define read_amcntenset1_el0() read_amcntenset1() +/* Helper functions to manipulate CPSR */ +static inline void enable_irq(void) +{ + /* + * The compiler memory barrier will prevent the compiler from + * scheduling non-volatile memory access after the write to the + * register. + * + * This could happen if some initialization code issues non-volatile + * accesses to an area used by an interrupt handler, in the assumption + * that it is safe as the interrupts are disabled at the time it does + * that (according to program order). However, non-volatile accesses + * are not necessarily in program order relatively with volatile inline + * assembly statements (and volatile accesses). + */ + COMPILER_BARRIER(); + __asm__ volatile ("cpsie i"); + isb(); +} + +static inline void enable_serror(void) +{ + COMPILER_BARRIER(); + __asm__ volatile ("cpsie a"); + isb(); +} + +static inline void enable_fiq(void) +{ + COMPILER_BARRIER(); + __asm__ volatile ("cpsie f"); + isb(); +} + +static inline void disable_irq(void) +{ + COMPILER_BARRIER(); + __asm__ volatile ("cpsid i"); + isb(); +} + +static inline void disable_serror(void) +{ + COMPILER_BARRIER(); + __asm__ volatile ("cpsid a"); + isb(); +} + +static inline void disable_fiq(void) +{ + COMPILER_BARRIER(); + __asm__ volatile ("cpsid f"); + isb(); +} + #endif /* ARCH_HELPERS_H */ diff --git a/include/lib/aarch64/arch_helpers.h b/include/lib/aarch64/arch_helpers.h index 92b16fc8d..7222b9dc7 100644 --- a/include/lib/aarch64/arch_helpers.h +++ b/include/lib/aarch64/arch_helpers.h @@ -215,6 +215,74 @@ DEFINE_SYSOP_TYPE_FUNC(dmb, ishst) DEFINE_SYSOP_TYPE_FUNC(dmb, ish) DEFINE_SYSOP_FUNC(isb) +static inline void enable_irq(void) +{ + /* + * The compiler memory barrier will prevent the compiler from + * scheduling non-volatile memory access after the write to the + * register. + * + * This could happen if some initialization code issues non-volatile + * accesses to an area used by an interrupt handler, in the assumption + * that it is safe as the interrupts are disabled at the time it does + * that (according to program order). However, non-volatile accesses + * are not necessarily in program order relatively with volatile inline + * assembly statements (and volatile accesses). + */ + COMPILER_BARRIER(); + write_daifclr(DAIF_IRQ_BIT); + isb(); +} + +static inline void enable_fiq(void) +{ + COMPILER_BARRIER(); + write_daifclr(DAIF_FIQ_BIT); + isb(); +} + +static inline void enable_serror(void) +{ + COMPILER_BARRIER(); + write_daifclr(DAIF_ABT_BIT); + isb(); +} + +static inline void enable_debug_exceptions(void) +{ + COMPILER_BARRIER(); + write_daifclr(DAIF_DBG_BIT); + isb(); +} + +static inline void disable_irq(void) +{ + COMPILER_BARRIER(); + write_daifset(DAIF_IRQ_BIT); + isb(); +} + +static inline void disable_fiq(void) +{ + COMPILER_BARRIER(); + write_daifset(DAIF_FIQ_BIT); + isb(); +} + +static inline void disable_serror(void) +{ + COMPILER_BARRIER(); + write_daifset(DAIF_ABT_BIT); + isb(); +} + +static inline void disable_debug_exceptions(void) +{ + COMPILER_BARRIER(); + write_daifset(DAIF_DBG_BIT); + isb(); +} + #if !ERROR_DEPRECATED uint32_t get_afflvl_shift(uint32_t); uint32_t mpidr_mask_lower_afflvls(uint64_t, uint32_t);