Tegra194: add MC_SECURITY mask defines

This patch adds masks for the TZDRAM base/size registers.

Change-Id: I5f688793be8cace28d2aa2d177a295e4faffd666
Signed-off-by: Harvey Hsieh <hhsieh@nvidia.com>
This commit is contained in:
Harvey Hsieh 2017-08-09 16:26:33 +08:00 committed by Varun Wadekar
parent cda7d91f67
commit c0e1bcd0d3
1 changed files with 4 additions and 0 deletions

View File

@ -110,6 +110,10 @@
#define MC_SECURITY_CFG1_0 0x74
#define MC_SECURITY_CFG3_0 0x9BC
#define MC_SECURITY_BOM_MASK (U(0xFFF) << 20)
#define MC_SECURITY_SIZE_MB_MASK (U(0x1FFF) << 0)
#define MC_SECURITY_BOM_HI_MASK (U(0x3) << 0)
/* Video Memory carveout configuration registers */
#define MC_VIDEO_PROTECT_BASE_HI 0x978
#define MC_VIDEO_PROTECT_BASE_LO 0x648