Tegra194: add MC_SECURITY mask defines
This patch adds masks for the TZDRAM base/size registers. Change-Id: I5f688793be8cace28d2aa2d177a295e4faffd666 Signed-off-by: Harvey Hsieh <hhsieh@nvidia.com>
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@ -110,6 +110,10 @@
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#define MC_SECURITY_CFG1_0 0x74
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#define MC_SECURITY_CFG3_0 0x9BC
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#define MC_SECURITY_BOM_MASK (U(0xFFF) << 20)
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#define MC_SECURITY_SIZE_MB_MASK (U(0x1FFF) << 0)
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#define MC_SECURITY_BOM_HI_MASK (U(0x3) << 0)
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/* Video Memory carveout configuration registers */
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#define MC_VIDEO_PROTECT_BASE_HI 0x978
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#define MC_VIDEO_PROTECT_BASE_LO 0x648
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