Merge pull request #1441 from robertovargas-arm/mem_protect_board
Move mem-protect definitions to board specific files
This commit is contained in:
commit
c125a14eea
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@ -122,14 +122,6 @@
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#define PLAT_ARM_NVM_BASE V2M_FLASH0_BASE
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#define PLAT_ARM_NVM_BASE V2M_FLASH0_BASE
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#define PLAT_ARM_NVM_SIZE (V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE)
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#define PLAT_ARM_NVM_SIZE (V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE)
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/* PSCI memory protect definitions:
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* This variable is stored in a non-secure flash because some ARM reference
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* platforms do not have secure NVRAM. Real systems that provided MEM_PROTECT
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* support must use a secure NVRAM to store the PSCI MEM_PROTECT definitions.
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*/
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#define PLAT_ARM_MEM_PROT_ADDR (V2M_FLASH0_BASE + \
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V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE)
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/*
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/*
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* Map mem_protect flash region with read and write permissions
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* Map mem_protect flash region with read and write permissions
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*/
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*/
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@ -142,4 +142,15 @@
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#define FVP_NSAID_HDLCD0 2
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#define FVP_NSAID_HDLCD0 2
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#define FVP_NSAID_CLCD 7
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#define FVP_NSAID_CLCD 7
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/*******************************************************************************
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* Memprotect definitions
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******************************************************************************/
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/* PSCI memory protect definitions:
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* This variable is stored in a non-secure flash because some ARM reference
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* platforms do not have secure NVRAM. Real systems that provided MEM_PROTECT
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* support must use a secure NVRAM to store the PSCI MEM_PROTECT definitions.
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*/
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#define PLAT_ARM_MEM_PROT_ADDR (V2M_FLASH0_BASE + \
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V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE)
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#endif /* __FVP_DEF_H__ */
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#endif /* __FVP_DEF_H__ */
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@ -79,4 +79,15 @@
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#define JUNO_IRQ_GPU_SMMU_1 73
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#define JUNO_IRQ_GPU_SMMU_1 73
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#define JUNO_IRQ_ETR_SMMU 75
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#define JUNO_IRQ_ETR_SMMU 75
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/*******************************************************************************
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* Memprotect definitions
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******************************************************************************/
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/* PSCI memory protect definitions:
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* This variable is stored in a non-secure flash because some ARM reference
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* platforms do not have secure NVRAM. Real systems that provided MEM_PROTECT
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* support must use a secure NVRAM to store the PSCI MEM_PROTECT definitions.
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*/
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#define PLAT_ARM_MEM_PROT_ADDR (V2M_FLASH0_BASE + \
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V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE)
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#endif /* __JUNO_DEF_H__ */
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#endif /* __JUNO_DEF_H__ */
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@ -96,4 +96,16 @@
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GET_SSC_VERSION_CONFIG(mmio_read_32(SSC_VERSION))
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GET_SSC_VERSION_CONFIG(mmio_read_32(SSC_VERSION))
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#endif /* __ASSEMBLY__ */
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#endif /* __ASSEMBLY__ */
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/*******************************************************************************
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* Memprotect definitions
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******************************************************************************/
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/* PSCI memory protect definitions:
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* This variable is stored in a non-secure flash because some ARM reference
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* platforms do not have secure NVRAM. Real systems that provided MEM_PROTECT
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* support must use a secure NVRAM to store the PSCI MEM_PROTECT definitions.
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*/
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#define PLAT_ARM_MEM_PROT_ADDR (V2M_FLASH0_BASE + \
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V2M_FLASH0_SIZE - V2M_FLASH_BLOCK_SIZE)
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#endif /* __PLATFORM_DEF_H__ */
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#endif /* __PLATFORM_DEF_H__ */
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