Merge pull request #179 from jcastillo-arm/jc/tf-issues/219
Call platform_is_primary_cpu() only from reset handler
This commit is contained in:
commit
c1efc4c066
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@ -47,16 +47,6 @@ func bl2_entrypoint
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mov x20, x0
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mov x20, x0
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mov x21, x1
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mov x21, x1
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/* ---------------------------------------------
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* This is BL2 which is expected to be executed
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* only by the primary cpu (at least for now).
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* So, make sure no secondary has lost its way.
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* ---------------------------------------------
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*/
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mrs x0, mpidr_el1
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bl platform_is_primary_cpu
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cbz x0, _panic
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/* ---------------------------------------------
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/* ---------------------------------------------
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* Set the exception vector to something sane.
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* Set the exception vector to something sane.
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* ---------------------------------------------
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* ---------------------------------------------
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@ -129,16 +129,6 @@ func bl31_entrypoint
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*/
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*/
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wait_for_entrypoint
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wait_for_entrypoint
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bl platform_mem_init
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bl platform_mem_init
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#else
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/* ---------------------------------------------
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* This is BL31 which is expected to be executed
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* only by the primary cpu (at least for now).
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* So, make sure no secondary has lost its way.
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* ---------------------------------------------
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*/
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mrs x0, mpidr_el1
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bl platform_is_primary_cpu
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cbz x0, _panic
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#endif
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#endif
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/* ---------------------------------------------
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/* ---------------------------------------------
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@ -71,16 +71,6 @@
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func tsp_entrypoint
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func tsp_entrypoint
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/* ---------------------------------------------
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* The entrypoint is expected to be executed
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* only by the primary cpu (at least for now).
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* So, make sure no secondary has lost its way.
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* ---------------------------------------------
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*/
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mrs x0, mpidr_el1
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bl platform_is_primary_cpu
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cbz x0, tsp_entrypoint_panic
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/* ---------------------------------------------
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/* ---------------------------------------------
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* Set the exception vector to something sane.
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* Set the exception vector to something sane.
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* ---------------------------------------------
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* ---------------------------------------------
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@ -150,11 +150,6 @@ file is found in [plat/fvp/include/platform_def.h].
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Defines the total number of nodes in the affinity heirarchy at all affinity
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Defines the total number of nodes in the affinity heirarchy at all affinity
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levels used by the platform.
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levels used by the platform.
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* **#define : PRIMARY_CPU**
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Defines the `MPIDR` of the primary CPU on the platform. This value is used
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after a cold boot to distinguish between primary and secondary CPUs.
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* **#define : TZROM_BASE**
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* **#define : TZROM_BASE**
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Defines the base address of secure ROM on the platform, where the BL1 binary
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Defines the base address of secure ROM on the platform, where the BL1 binary
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@ -360,6 +355,17 @@ requires them.
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This function fulfills requirement 2 above.
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This function fulfills requirement 2 above.
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### Function : platform_is_primary_cpu() [mandatory]
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Argument : unsigned long
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Return : unsigned int
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This function identifies a CPU by its `MPIDR`, which is passed as the argument,
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to determine whether this CPU is the primary CPU or a secondary CPU. A return
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value of zero indicates that the CPU is not the primary CPU, while a non-zero
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return value indicates that the CPU is the primary CPU.
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### Function : platform_mem_init() [mandatory]
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### Function : platform_mem_init() [mandatory]
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Argument : void
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Argument : void
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@ -398,17 +404,6 @@ maximum of 4 CPUs:
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cluster_id = 8-bit value in MPIDR at affinity level 1
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cluster_id = 8-bit value in MPIDR at affinity level 1
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### Function : platform_is_primary_cpu()
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Argument : unsigned long
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Return : unsigned int
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This function identifies a CPU by its `MPIDR`, which is passed as the argument,
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to determine whether this CPU is the primary CPU or a secondary CPU. A return
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value of zero indicates that the CPU is not the primary CPU, while a non-zero
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return value indicates that the CPU is the primary CPU.
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### Function : platform_set_stack()
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### Function : platform_set_stack()
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Argument : unsigned long
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Argument : unsigned long
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@ -34,7 +34,6 @@
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.weak platform_get_core_pos
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.weak platform_get_core_pos
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.weak platform_is_primary_cpu
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.weak platform_check_mpidr
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.weak platform_check_mpidr
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.weak plat_report_exception
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.weak plat_report_exception
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.weak plat_crash_console_init
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.weak plat_crash_console_init
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@ -52,19 +51,6 @@ func platform_get_core_pos
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add x0, x1, x0, LSR #6
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add x0, x1, x0, LSR #6
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ret
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ret
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/* -----------------------------------------------------
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* void platform_is_primary_cpu (unsigned int mpid);
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*
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* Given the mpidr say whether this cpu is the primary
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* cpu (applicable ony after a cold boot)
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* -----------------------------------------------------
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*/
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func platform_is_primary_cpu
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and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
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cmp x0, #PRIMARY_CPU
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cset x0, eq
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ret
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/* -----------------------------------------------------
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/* -----------------------------------------------------
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* Placeholder function which should be redefined by
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* Placeholder function which should be redefined by
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* each platform.
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* each platform.
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@ -40,6 +40,7 @@
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.globl plat_secondary_cold_boot_setup
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.globl plat_secondary_cold_boot_setup
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.globl platform_mem_init
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.globl platform_mem_init
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.globl plat_report_exception
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.globl plat_report_exception
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.globl platform_is_primary_cpu
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.globl plat_crash_console_init
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.globl plat_crash_console_init
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.globl plat_crash_console_putc
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.globl plat_crash_console_putc
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@ -191,6 +192,12 @@ func plat_report_exception
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str w0, [x1]
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str w0, [x1]
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ret
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ret
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func platform_is_primary_cpu
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and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
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cmp x0, #FVP_PRIMARY_CPU
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cset x0, eq
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ret
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/* Define a crash console for the plaform */
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/* Define a crash console for the plaform */
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#define FVP_CRASH_CONSOLE_BASE PL011_UART0_BASE
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#define FVP_CRASH_CONSOLE_BASE PL011_UART0_BASE
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@ -36,6 +36,7 @@
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/* Firmware Image Package */
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/* Firmware Image Package */
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#define FIP_IMAGE_NAME "fip.bin"
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#define FIP_IMAGE_NAME "fip.bin"
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#define FVP_PRIMARY_CPU 0x0
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/*******************************************************************************
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/*******************************************************************************
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* FVP memory map related constants
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* FVP memory map related constants
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@ -70,7 +70,6 @@
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#define PLATFORM_MAX_CPUS_PER_CLUSTER 4
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#define PLATFORM_MAX_CPUS_PER_CLUSTER 4
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#define PLATFORM_NUM_AFFS (PLATFORM_CLUSTER_COUNT + \
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#define PLATFORM_NUM_AFFS (PLATFORM_CLUSTER_COUNT + \
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PLATFORM_CORE_COUNT)
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PLATFORM_CORE_COUNT)
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#define PRIMARY_CPU 0x0
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#define MAX_IO_DEVICES 3
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#define MAX_IO_DEVICES 3
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#define MAX_IO_HANDLES 4
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#define MAX_IO_HANDLES 4
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