From 182ce1015583ad05462f58ec0e0651529341b990 Mon Sep 17 00:00:00 2001 From: johpow01 Date: Wed, 7 Oct 2020 16:38:37 -0500 Subject: [PATCH] errata: workaround for Neoverse V1 errata 1940577 Neoverse V1 erratum 1940577 is a Cat B erratum, present in some revisions of the V1 processor core. The workaround is to insert a DMB ST before acquire atomic instructions without release semantics. This issue is present in revisions r0p0 - r1p1 but this workaround only applies to revisions r1p0 - r1p1, there is no workaround for older versions. SDEN can be found here: https://documentation-service.arm.com/static/60d499080320e92fa40b4625 Signed-off-by: John Powell Change-Id: I210ad7d8f31c81b6ac51b028dfbce75a725c11aa --- docs/design/cpu-specific-build-macros.rst | 4 ++ lib/cpus/aarch64/neoverse_v1.S | 61 +++++++++++++++++++++++ lib/cpus/cpu-ops.mk | 8 +++ 3 files changed, 73 insertions(+) diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst index 8d17d357c..949845ab8 100644 --- a/docs/design/cpu-specific-build-macros.rst +++ b/docs/design/cpu-specific-build-macros.rst @@ -329,6 +329,10 @@ For Neoverse V1, the following errata build flags are defined : CPU. This needs to be enabled only for revisions r0p0 and r1p0, it is fixed in r1p1. +- ``ERRATA_V1_1940577``: This applies errata 1940577 workaround to Neoverse-V1 + CPU. This needs to be enabled only for revision r1p0 and r1p1 of the + CPU. + DSU Errata Workarounds ---------------------- diff --git a/lib/cpus/aarch64/neoverse_v1.S b/lib/cpus/aarch64/neoverse_v1.S index d461b10c4..cee0bb733 100644 --- a/lib/cpus/aarch64/neoverse_v1.S +++ b/lib/cpus/aarch64/neoverse_v1.S @@ -49,6 +49,61 @@ func check_errata_1791573 b cpu_rev_var_ls endfunc check_errata_1791573 + /* -------------------------------------------------- + * Errata Workaround for Neoverse V1 Erratum #1940577 + * This applies to revisions r1p0 - r1p1 and is open. + * It also exists in r0p0 but there is no fix in that + * revision. + * Inputs: + * x0: variant[4:7] and revision[0:3] of current cpu. + * Shall clobber: x0-x17 + * -------------------------------------------------- + */ +func errata_neoverse_v1_1940577_wa + /* Compare x0 against revisions r1p0 - r1p1 */ + mov x17, x30 + bl check_errata_1940577 + cbz x0, 1f + + mov x0, #0 + msr S3_6_C15_C8_0, x0 + ldr x0, =0x10E3900002 + msr S3_6_C15_C8_2, x0 + ldr x0, =0x10FFF00083 + msr S3_6_C15_C8_3, x0 + ldr x0, =0x2001003FF + msr S3_6_C15_C8_1, x0 + + mov x0, #1 + msr S3_6_C15_C8_0, x0 + ldr x0, =0x10E3800082 + msr S3_6_C15_C8_2, x0 + ldr x0, =0x10FFF00083 + msr S3_6_C15_C8_3, x0 + ldr x0, =0x2001003FF + msr S3_6_C15_C8_1, x0 + + mov x0, #2 + msr S3_6_C15_C8_0, x0 + ldr x0, =0x10E3800200 + msr S3_6_C15_C8_2, x0 + ldr x0, =0x10FFF003E0 + msr S3_6_C15_C8_3, x0 + ldr x0, =0x2001003FF + msr S3_6_C15_C8_1, x0 + + isb +1: + ret x17 +endfunc errata_neoverse_v1_1940577_wa + +func check_errata_1940577 + /* Applies to revisions r1p0 - r1p1. */ + mov x1, #0x10 + mov x2, #0x11 + b cpu_rev_var_range +endfunc check_errata_1940577 + /* --------------------------------------------- * HW will do the cache maintenance while powering down * --------------------------------------------- @@ -80,6 +135,7 @@ func neoverse_v1_errata_report * checking functions of each errata. */ report_errata ERRATA_V1_1791573, neoverse_v1, 1791573 + report_errata ERRATA_V1_1940577, neoverse_v1, 1940577 ldp x8, x30, [sp], #16 ret @@ -98,6 +154,11 @@ func neoverse_v1_reset_func bl errata_neoverse_v1_1791573_wa #endif +#if ERRATA_V1_1940577 + mov x0, x18 + bl errata_neoverse_v1_1940577_wa +#endif + ret x19 endfunc neoverse_v1_reset_func diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk index b34fed64a..6f80d2d4f 100644 --- a/lib/cpus/cpu-ops.mk +++ b/lib/cpus/cpu-ops.mk @@ -376,6 +376,10 @@ ERRATA_N1_1946160 ?=0 # to revisions r0p0 and r1p0 of the Neoverse V1 core, and was fixed in r1p1. ERRATA_V1_1791573 ?=0 +# Flag to apply erratum 1940577 workaround during reset. This erratum applies +# to revisions r1p0 and r1p1 of the Neoverse V1 cpu. +ERRATA_V1_1940577 ?=0 + # Flag to apply DSU erratum 798953. This erratum applies to DSUs revision r0p0. # Applying the workaround results in higher DSU power consumption on idle. ERRATA_DSU_798953 ?=0 @@ -685,6 +689,10 @@ $(eval $(call add_define,ERRATA_N1_1946160)) $(eval $(call assert_boolean,ERRATA_V1_1791573)) $(eval $(call add_define,ERRATA_V1_1791573)) +# Process ERRATA_V1_1940577 flag +$(eval $(call assert_boolean,ERRATA_V1_1940577)) +$(eval $(call add_define,ERRATA_V1_1940577)) + # Process ERRATA_DSU_798953 flag $(eval $(call assert_boolean,ERRATA_DSU_798953)) $(eval $(call add_define,ERRATA_DSU_798953))