imx: imx_csu: Add a simple CSU layer
- Add a header to define imx_csu_init(). - Defines the Central Security Unit's Config Security Level permission bits. - Define CSU_CSL_OPEN_ACCESS permission bitmask - Run a loop to setup peripheral CSU permissions Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
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/*
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* Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <mmio.h>
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#include <imx_csu.h>
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#include <imx_regs.h>
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void imx_csu_init(void)
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{
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int i;
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uintptr_t *csl_reg = (uintptr_t *)CSU_BASE;
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for (i = 0; i < MXC_MAX_CSU_REGS; i++, csl_reg++)
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mmio_write_32((uintptr_t)csl_reg, CSU_CSL_OPEN_ACCESS);
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}
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/*
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* Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef __IMX_CSU_H__
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#define __IMX_CSU_H__
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#include <arch.h>
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/*
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* Security Reference Manual for i.MX 7Dual and 7Solo Applications Processors,
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* Rev. 0, 03/2017 Section 3.3.1
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*
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* Config secure level register (CSU_CSLn)
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*/
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#define CSU_CSL_LOCK_S1 BIT(24)
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#define CSU_CSL_NSW_S1 BIT(23)
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#define CSU_CSL_NUW_S1 BIT(22)
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#define CSU_CSL_SSW_S1 BIT(21)
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#define CSU_CSL_SUW_S1 BIT(20)
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#define CSU_CSL_NSR_S1 BIT(19)
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#define CSU_CSL_NUR_S1 BIT(18)
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#define CSU_CSL_SSR_S1 BIT(17)
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#define CSU_CSL_SUR_S1 BIT(16)
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#define CSU_CSL_LOCK_S2 BIT(8)
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#define CSU_CSL_NSW_S2 BIT(7)
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#define CSU_CSL_NUW_S2 BIT(6)
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#define CSU_CSL_SSW_S2 BIT(5)
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#define CSU_CSL_SUW_S2 BIT(4)
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#define CSU_CSL_NSR_S2 BIT(3)
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#define CSU_CSL_NUR_S2 BIT(2)
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#define CSU_CSL_SSR_S2 BIT(1)
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#define CSU_CSL_SUR_S2 BIT(0)
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#define CSU_CSL_OPEN_ACCESS (CSU_CSL_NSW_S1 | CSU_CSL_NUW_S1 | CSU_CSL_SSW_S1 |\
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CSU_CSL_SUW_S1 | CSU_CSL_NSR_S1 | CSU_CSL_NUR_S1 |\
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CSU_CSL_SSR_S1 | CSU_CSL_SUR_S1 | CSU_CSL_NSW_S2 |\
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CSU_CSL_NUW_S2 | CSU_CSL_SSW_S2 | CSU_CSL_SUW_S2 |\
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CSU_CSL_NSR_S2 | CSU_CSL_NUR_S2 | CSU_CSL_SSR_S2 |\
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CSU_CSL_SUR_S2)
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void imx_csu_init(void);
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#endif /* __IMX_CSU_H__ */
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