juno: Port CCI
Signed-off-by: Jon Medhurst <tixy@linaro.org>
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@ -123,17 +123,12 @@ void bl1_platform_setup(void)
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******************************************************************************/
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******************************************************************************/
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void bl1_plat_arch_setup(void)
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void bl1_plat_arch_setup(void)
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{
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{
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unsigned long cci_setup;
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/*
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/*
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* Enable CCI-400 for this cluster. No need
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* Enable CCI-400 for this cluster. No need
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* for locks as no other cpu is active at the
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* for locks as no other cpu is active at the
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* moment
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* moment
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*/
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*/
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cci_setup = platform_get_cfgvar(CONFIG_HAS_CCI);
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cci_enable_coherency(read_mpidr());
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if (cci_setup) {
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cci_enable_coherency(read_mpidr());
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}
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configure_mmu(&bl1_tzram_layout,
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configure_mmu(&bl1_tzram_layout,
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TZROM_BASE,
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TZROM_BASE,
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@ -160,8 +160,8 @@
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* CCI-400 related constants
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* CCI-400 related constants
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******************************************************************************/
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******************************************************************************/
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#define CCI400_BASE 0x2c090000
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#define CCI400_BASE 0x2c090000
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#define CCI400_SL_IFACE_CLUSTER0 3
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#define CCI400_SL_IFACE_CLUSTER0 4
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#define CCI400_SL_IFACE_CLUSTER1 4
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#define CCI400_SL_IFACE_CLUSTER1 3
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#define CCI400_SL_IFACE_INDEX(mpidr) (mpidr & MPIDR_CLUSTER_MASK ? \
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#define CCI400_SL_IFACE_INDEX(mpidr) (mpidr & MPIDR_CLUSTER_MASK ? \
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CCI400_SL_IFACE_CLUSTER1 : \
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CCI400_SL_IFACE_CLUSTER1 : \
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CCI400_SL_IFACE_CLUSTER0)
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CCI400_SL_IFACE_CLUSTER0)
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