diff --git a/Makefile b/Makefile
index c5073e016..961423826 100644
--- a/Makefile
+++ b/Makefile
@@ -865,6 +865,7 @@ $(eval $(call assert_booleans,\
         CTX_INCLUDE_PAUTH_REGS \
         CTX_INCLUDE_MTE_REGS \
         CTX_INCLUDE_EL2_REGS \
+        CTX_INCLUDE_NEVE_REGS \
         DEBUG \
         DYN_DISABLE_AUTH \
         EL3_EXCEPTION_HANDLING \
@@ -953,6 +954,7 @@ $(eval $(call add_defines,\
         EL3_EXCEPTION_HANDLING \
         CTX_INCLUDE_MTE_REGS \
         CTX_INCLUDE_EL2_REGS \
+        CTX_INCLUDE_NEVE_REGS \
         DECRYPTION_SUPPORT_${DECRYPTION_SUPPORT} \
         ENABLE_AMU \
         ENABLE_ASSERTIONS \
diff --git a/docs/getting_started/build-options.rst b/docs/getting_started/build-options.rst
index 40fc5dbbc..8adf4ad8b 100644
--- a/docs/getting_started/build-options.rst
+++ b/docs/getting_started/build-options.rst
@@ -161,6 +161,10 @@ Common build options
    registers to be included when saving and restoring the CPU context. Default
    is 0.
 
+-  ``CTX_INCLUDE_NEVE_REGS``: Boolean option that, when set to 1, will cause the
+   Armv8.4-NV registers to be saved/restored when entering/exiting an EL2
+   execution context. Default value is 0.
+
 -  ``CTX_INCLUDE_PAUTH_REGS``: Boolean option that, when set to 1, enables
    Pointer Authentication for Secure world. This will cause the ARMv8.3-PAuth
    registers to be included when saving and restoring the CPU context as
diff --git a/lib/el3_runtime/aarch64/context.S b/lib/el3_runtime/aarch64/context.S
index 1cb527d99..773082a85 100644
--- a/lib/el3_runtime/aarch64/context.S
+++ b/lib/el3_runtime/aarch64/context.S
@@ -65,9 +65,13 @@ func el2_sysregs_context_save
 	mrs	x9, cptr_el2
 	stp	x17, x9, [x0, #CTX_CNTVOFF_EL2]
 
-	mrs	x10, dbgvcr32_el2
 	mrs	x11, elr_el2
+#if CTX_INCLUDE_AARCH32_REGS
+	mrs	x10, dbgvcr32_el2
 	stp	x10, x11, [x0, #CTX_DBGVCR32_EL2]
+#else
+	str	x11, [x0, #CTX_ELR_EL2]
+#endif
 
 	mrs	x14, esr_el2
 	mrs	x15, far_el2
@@ -90,8 +94,12 @@ func el2_sysregs_context_save
 	stp	x13, x14, [x0, #CTX_ICH_VMCR_EL2]
 
 	mrs	x15, mdcr_el2
+#if ENABLE_SPE_FOR_LOWER_ELS
 	mrs	x16, PMSCR_EL2
 	stp	x15, x16, [x0, #CTX_MDCR_EL2]
+#else
+	str	x15, [x0, #CTX_MDCR_EL2]
+#endif
 
 	mrs	x17, sctlr_el2
 	mrs	x9, spsr_el2
@@ -185,8 +193,10 @@ func el2_sysregs_context_save
 	mrs	x9, contextidr_el2
 	stp	x17, x9, [x0, #CTX_CNTHV_TVAL_EL2]
 
+#if CTX_INCLUDE_AARCH32_REGS
 	mrs	x10, sder32_el2
 	str	x10, [x0, #CTX_SDER32_EL2]
+#endif
 
 	mrs	x11, ttbr1_el2
 	str	x11, [x0, #CTX_TTBR1_EL2]
@@ -194,8 +204,10 @@ func el2_sysregs_context_save
 	mrs	x12, vdisr_el2
 	str	x12, [x0, #CTX_VDISR_EL2]
 
+#if CTX_INCLUDE_NEVE_REGS
 	mrs	x13, vncr_el2
 	str	x13, [x0, #CTX_VNCR_EL2]
+#endif
 
 	mrs	x14, vsesr_el2
 	str	x14, [x0, #CTX_VSESR_EL2]
@@ -255,8 +267,12 @@ func el2_sysregs_context_restore
 	msr	cntvoff_el2, x17
 	msr	cptr_el2, x9
 
+#if CTX_INCLUDE_AARCH32_REGS
 	ldp	x10, x11, [x0, #CTX_DBGVCR32_EL2]
 	msr	dbgvcr32_el2, x10
+#else
+	ldr	x11, [x0, #CTX_ELR_EL2]
+#endif
 	msr	elr_el2, x11
 
 	ldp	x14, x15, [x0, #CTX_ESR_EL2]
@@ -279,9 +295,13 @@ func el2_sysregs_context_restore
 	msr	ICH_VMCR_EL2, x13
 	msr	mair_el2, x14
 
+#if ENABLE_SPE_FOR_LOWER_ELS
 	ldp	x15, x16, [x0, #CTX_MDCR_EL2]
-	msr	mdcr_el2, x15
 	msr	PMSCR_EL2, x16
+#else
+	ldr	x15, [x0, #CTX_MDCR_EL2]
+#endif
+	msr	mdcr_el2, x15
 
 	ldp	x17, x9, [x0, #CTX_SCTLR_EL2]
 	msr	sctlr_el2, x17
@@ -374,8 +394,10 @@ func el2_sysregs_context_restore
 	msr	cnthv_tval_el2, x9
 	msr	contextidr_el2, x10
 
+#if CTX_INCLUDE_AARCH32_REGS
 	ldr	x11, [x0, #CTX_SDER32_EL2]
 	msr	sder32_el2, x11
+#endif
 
 	ldr	x12, [x0, #CTX_TTBR1_EL2]
 	msr	ttbr1_el2, x12
@@ -383,8 +405,10 @@ func el2_sysregs_context_restore
 	ldr	x13, [x0, #CTX_VDISR_EL2]
 	msr	vdisr_el2, x13
 
+#if CTX_INCLUDE_NEVE_REGS
 	ldr	x14, [x0, #CTX_VNCR_EL2]
 	msr	vncr_el2, x14
+#endif
 
 	ldr	x15, [x0, #CTX_VSESR_EL2]
 	msr	vsesr_el2, x15
diff --git a/make_helpers/defaults.mk b/make_helpers/defaults.mk
index bc4982d64..578bd5987 100644
--- a/make_helpers/defaults.mk
+++ b/make_helpers/defaults.mk
@@ -62,6 +62,11 @@ CTX_INCLUDE_FPREGS		:= 0
 # world. It is not needed to use it in the Non-secure world.
 CTX_INCLUDE_PAUTH_REGS		:= 0
 
+# Include Nested virtualization control (Armv8.4-NV) registers in cpu context.
+# This must be set to 1 if architecture implements Nested Virtualization
+# Extension and platform wants to use this feature in the Secure world
+CTX_INCLUDE_NEVE_REGS		:= 0
+
 # Debug build
 DEBUG				:= 0