Merge pull request #1803 from sandrine-bailleux-arm/sb/arm-bl33-fixes
Fixes related to BL33 image on Arm platforms
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commit
c57abde6f5
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@ -183,7 +183,7 @@
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#endif /* CSS_LOAD_SCP_IMAGES */
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/* Load address of Non-Secure Image for CSS platform ports */
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#define PLAT_ARM_NS_IMAGE_OFFSET U(0xE0000000)
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#define PLAT_ARM_NS_IMAGE_BASE U(0xE0000000)
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/* TZC related constants */
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#define PLAT_ARM_TZC_FILTERS TZC_400_REGION_ATTR_FILTER_BIT_ALL
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@ -53,7 +53,7 @@
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/*
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* Load address of BL33 for this platform port
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*/
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#define PLAT_ARM_NS_IMAGE_OFFSET (ARM_DRAM1_BASE + UL(0x8000000))
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#define PLAT_ARM_NS_IMAGE_BASE (ARM_DRAM1_BASE + UL(0x8000000))
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/*
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* PLAT_ARM_MMAP_ENTRIES depends on the number of entries in the
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@ -75,12 +75,13 @@ static bl_mem_params_node_t bl2_mem_params_descs[] = {
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SET_STATIC_PARAM_HEAD(image_info, PARAM_EP,
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VERSION_2, image_info_t, IMAGE_ATTRIB_SKIP_LOADING),
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#else
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.ep_info.pc = PLAT_ARM_NS_IMAGE_OFFSET,
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.ep_info.pc = PLAT_ARM_NS_IMAGE_BASE,
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SET_STATIC_PARAM_HEAD(image_info, PARAM_EP,
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VERSION_2, image_info_t, 0),
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.image_info.image_base = PLAT_ARM_NS_IMAGE_OFFSET,
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.image_info.image_max_size = ARM_DRAM1_SIZE,
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.image_info.image_base = PLAT_ARM_NS_IMAGE_BASE,
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.image_info.image_max_size = ARM_DRAM1_BASE + ARM_DRAM1_SIZE
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- PLAT_ARM_NS_IMAGE_BASE,
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#endif /* PRELOADED_BL33_BASE */
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.next_handoff_image_id = INVALID_IMAGE_ID,
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@ -176,12 +176,13 @@ static bl_mem_params_node_t bl2_mem_params_descs[] = {
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SET_STATIC_PARAM_HEAD(image_info, PARAM_EP,
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VERSION_2, image_info_t, IMAGE_ATTRIB_SKIP_LOADING),
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# else
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.ep_info.pc = PLAT_ARM_NS_IMAGE_OFFSET,
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.ep_info.pc = PLAT_ARM_NS_IMAGE_BASE,
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SET_STATIC_PARAM_HEAD(image_info, PARAM_EP,
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VERSION_2, image_info_t, 0),
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.image_info.image_base = PLAT_ARM_NS_IMAGE_OFFSET,
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.image_info.image_max_size = ARM_DRAM1_SIZE,
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.image_info.image_base = PLAT_ARM_NS_IMAGE_BASE,
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.image_info.image_max_size = ARM_DRAM1_BASE + ARM_DRAM1_SIZE
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- PLAT_ARM_NS_IMAGE_BASE,
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# endif /* PRELOADED_BL33_BASE */
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.next_handoff_image_id = INVALID_IMAGE_ID,
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@ -40,7 +40,7 @@ uintptr_t plat_get_ns_image_entrypoint(void)
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#ifdef PRELOADED_BL33_BASE
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return PRELOADED_BL33_BASE;
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#else
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return PLAT_ARM_NS_IMAGE_OFFSET;
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return PLAT_ARM_NS_IMAGE_BASE;
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#endif
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}
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@ -21,7 +21,7 @@
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* until the end of DRAM1.
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* We limit the size of DRAM2 to 1 GB to avoid big delays while booting
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*/
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#define DRAM1_NS_IMAGE_LIMIT (PLAT_ARM_NS_IMAGE_OFFSET + (32 << TWO_MB_SHIFT))
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#define DRAM1_NS_IMAGE_LIMIT (PLAT_ARM_NS_IMAGE_BASE + (32 << TWO_MB_SHIFT))
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#define DRAM1_PROTECTED_SIZE (ARM_NS_DRAM1_END+1u - DRAM1_NS_IMAGE_LIMIT)
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static mem_region_t arm_ram_ranges[] = {
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@ -66,9 +66,9 @@
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* BL33 specific defines.
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******************************************************************************/
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#ifndef PRELOADED_BL33_BASE
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# define PLAT_ARM_NS_IMAGE_OFFSET 0x8000000
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# define PLAT_ARM_NS_IMAGE_BASE 0x8000000
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#else
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# define PLAT_ARM_NS_IMAGE_OFFSET PRELOADED_BL33_BASE
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# define PLAT_ARM_NS_IMAGE_BASE PRELOADED_BL33_BASE
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#endif
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/*******************************************************************************
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