rcar_gen3: plat: Dump EL3 interrupt error registers
Since the interrupts are handled in EL3, dump the EL3 error registers in case an error happens. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
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@ -217,6 +217,8 @@ endfunc platform_mem_init
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* ---------------------------------------------
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* ---------------------------------------------
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*/
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*/
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func plat_report_exception
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func plat_report_exception
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/* Switch to SP_EL0 */
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msr spsel, #0
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#if IMAGE_BL2
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#if IMAGE_BL2
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mov w1, #FIQ_SP_EL0
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mov w1, #FIQ_SP_EL0
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cmp w0, w1
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cmp w0, w1
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@ -24,7 +24,7 @@ void bl2_interrupt_error_id(uint32_t int_id)
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ERROR("\n");
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ERROR("\n");
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if (int_id >= SWDT_ERROR_ID) {
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if (int_id >= SWDT_ERROR_ID) {
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ERROR("Unhandled exception occurred.\n");
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ERROR("Unhandled exception occurred.\n");
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ERROR(" Exception type = FIQ_SP_ELX\n");
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ERROR(" Exception type = FIQ_SP_EL0\n");
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panic();
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panic();
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}
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}
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@ -32,11 +32,11 @@ void bl2_interrupt_error_id(uint32_t int_id)
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gicv2_end_of_interrupt((uint32_t) int_id);
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gicv2_end_of_interrupt((uint32_t) int_id);
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rcar_swdt_release();
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rcar_swdt_release();
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ERROR("Unhandled exception occurred.\n");
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ERROR("Unhandled exception occurred.\n");
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ERROR(" Exception type = FIQ_SP_ELX\n");
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ERROR(" Exception type = FIQ_SP_EL0\n");
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ERROR(" SPSR_EL1 = 0x%x\n", (uint32_t) read_spsr_el1());
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ERROR(" SPSR_EL3 = 0x%x\n", (uint32_t) read_spsr_el3());
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ERROR(" ELR_EL1 = 0x%x\n", (uint32_t) read_elr_el1());
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ERROR(" ELR_EL3 = 0x%x\n", (uint32_t) read_elr_el3());
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ERROR(" ESR_EL1 = 0x%x\n", (uint32_t) read_esr_el1());
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ERROR(" ESR_EL3 = 0x%x\n", (uint32_t) read_esr_el3());
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ERROR(" FAR_EL1 = 0x%x\n", (uint32_t) read_far_el1());
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ERROR(" FAR_EL3 = 0x%x\n", (uint32_t) read_far_el3());
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ERROR("\n");
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ERROR("\n");
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panic();
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panic();
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}
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}
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@ -78,27 +78,27 @@ void bl2_interrupt_error_type(uint32_t ex_type)
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&interrupt_ex[ex_type][0]);
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&interrupt_ex[ex_type][0]);
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ERROR("%s", msg);
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ERROR("%s", msg);
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switch (ex_type) {
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switch (ex_type) {
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case SYNC_EXCEPTION_SP_ELX:
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case SYNC_EXCEPTION_SP_EL0:
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ERROR(" SPSR_EL1 = 0x%x\n", (uint32_t) read_spsr_el1());
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ERROR(" SPSR_EL3 = 0x%x\n", (uint32_t) read_spsr_el3());
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ERROR(" ELR_EL1 = 0x%x\n", (uint32_t) read_elr_el1());
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ERROR(" ELR_EL3 = 0x%x\n", (uint32_t) read_elr_el3());
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ERROR(" ESR_EL1 = 0x%x\n", (uint32_t) read_esr_el1());
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ERROR(" ESR_EL3 = 0x%x\n", (uint32_t) read_esr_el3());
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ERROR(" FAR_EL1 = 0x%x\n", (uint32_t) read_far_el1());
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ERROR(" FAR_EL3 = 0x%x\n", (uint32_t) read_far_el3());
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break;
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break;
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case IRQ_SP_ELX:
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case IRQ_SP_EL0:
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ERROR(" SPSR_EL1 = 0x%x\n", (uint32_t) read_spsr_el1());
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ERROR(" SPSR_EL3 = 0x%x\n", (uint32_t) read_spsr_el3());
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ERROR(" ELR_EL1 = 0x%x\n", (uint32_t) read_elr_el1());
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ERROR(" ELR_EL3 = 0x%x\n", (uint32_t) read_elr_el3());
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ERROR(" IAR_EL1 = 0x%x\n", gicv2_acknowledge_interrupt());
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ERROR(" IAR_EL3 = 0x%x\n", gicv2_acknowledge_interrupt());
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break;
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break;
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case FIQ_SP_ELX:
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case FIQ_SP_EL0:
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ERROR(" SPSR_EL1 = 0x%x\n", (uint32_t) read_spsr_el1());
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ERROR(" SPSR_EL3 = 0x%x\n", (uint32_t) read_spsr_el3());
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ERROR(" ELR_EL1 = 0x%x\n", (uint32_t) read_elr_el1());
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ERROR(" ELR_EL3 = 0x%x\n", (uint32_t) read_elr_el3());
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ERROR(" IAR_EL1 = 0x%x\n", gicv2_acknowledge_interrupt());
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ERROR(" IAR_EL3 = 0x%x\n", gicv2_acknowledge_interrupt());
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break;
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break;
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case SERROR_SP_ELX:
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case SERROR_SP_EL0:
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ERROR(" SPSR_EL1 = 0x%x\n", (uint32_t) read_spsr_el1());
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ERROR(" SPSR_EL3 = 0x%x\n", (uint32_t) read_spsr_el3());
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ERROR(" ELR_EL1 = 0x%x\n", (uint32_t) read_elr_el1());
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ERROR(" ELR_EL3 = 0x%x\n", (uint32_t) read_elr_el3());
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ERROR(" ESR_EL1 = 0x%x\n", (uint32_t) read_esr_el1());
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ERROR(" ESR_EL3 = 0x%x\n", (uint32_t) read_esr_el3());
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ERROR(" FAR_EL1 = 0x%x\n", (uint32_t) read_far_el1());
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ERROR(" FAR_EL3 = 0x%x\n", (uint32_t) read_far_el3());
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break;
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break;
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default:
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default:
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break;
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break;
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