lib: cpus: denver: add MIDR PN9 variant
This patch introduces support for PN9 variant for some Denver based platforms. Original change by: Hemant Nigam <hnigam@nvidia.com> Signed-off-by: Kalyani Chidambaram Vaidyanathan <kalyanic@nvidia.com> Change-Id: I331cd3a083721fd1cd1b03f4a11b32fd306a21f3
This commit is contained in:
parent
9b624a7deb
commit
c6d25c0042
|
@ -17,6 +17,7 @@
|
|||
#define DENVER_MIDR_PN6 U(0x4E0F0060)
|
||||
#define DENVER_MIDR_PN7 U(0x4E0F0070)
|
||||
#define DENVER_MIDR_PN8 U(0x4E0F0080)
|
||||
#define DENVER_MIDR_PN9 U(0x4E0F0090)
|
||||
|
||||
/* Implementer code in the MIDR register */
|
||||
#define DENVER_IMPL U(0x4E)
|
||||
|
|
|
@ -372,3 +372,4 @@ denver_cpu_ops_wa DENVER_MIDR_PN5
|
|||
denver_cpu_ops_wa DENVER_MIDR_PN6
|
||||
denver_cpu_ops_wa DENVER_MIDR_PN7
|
||||
denver_cpu_ops_wa DENVER_MIDR_PN8
|
||||
denver_cpu_ops_wa DENVER_MIDR_PN9
|
||||
|
|
Loading…
Reference in New Issue