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Tegra194: memctrl: enable mc coalescer 

This patch enable the Memory Controller's "Coalescer" feature to
improve performance of memory transactions.

Change-Id: I50ba0354116284f85d9e170c293ce77e9f3fb4d8
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
This commit is contained in:
Pritesh Raithatha 2017-12-18 23:00:05 -08:00 committed by Manish Pandey
parent f3ec5c0cc9
commit c766adce65
2 changed files with 7 additions and 1 deletions
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3
plat/nvidia/tegra/include/t194/tegra_mc_def.h
View File

@ -530,6 +530,9 @@
#define MC_CLIENT_HOTRESET_CTRL2_PCIE4A_FLUSH_ENB (1U << 25)
#define MC_CLIENT_HOTRESET_STATUS2 0x1898U
#define MC_COALESCE_CTRL 0x2930U
#define MC_COALESCE_CTRL_COALESCER_ENABLE (1U << 31)
/*******************************************************************************
* Tegra TSA Controller constants
******************************************************************************/

5
plat/nvidia/tegra/soc/t194/plat_memctrl.c
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -617,6 +617,9 @@ static void tegra194_memctrl_reconfig_mss_clients(void)
wdata_2 = MC_CLIENT_HOTRESET_CTRL2_RESET_VAL;
tegra_mc_write_32(MC_CLIENT_HOTRESET_CTRL2, wdata_2);
reg_val = MC_COALESCE_CTRL_COALESCER_ENABLE;
tegra_mc_write_32(MC_COALESCE_CTRL, reg_val);
}
/*******************************************************************************