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rockchip/rk3399: convert to for-loops to save code space 

This converts two functions to use for-loops. This saves a bit of
space to help moving DRAM resume code to PMUSRAM.

Change-Id: Ie6ca490cf50c2ec83335cf1845b337c3e8a47496
Signed-off-by: Derek Basehore <dbasehore@chromium.org>
This commit is contained in:
Derek Basehore 2017-05-12 21:29:13 -07:00 committed by Caesar Wang
parent 87aad73494
commit c82eef6ce5
1 changed files with 13 additions and 14 deletions
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27
plat/rockchip/rk3399/drivers/dram/suspend.c
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@ -121,11 +121,12 @@ static __sramfunc void phy_pctrl_reset(uint32_t ch)
static __sramfunc void set_cs_training_index(uint32_t ch, uint32_t rank) static __sramfunc void set_cs_training_index(uint32_t ch, uint32_t rank)
{ {
uint32_t byte;
/* PHY_8/136/264/392 phy_per_cs_training_index_X 1bit offset_24 */ /* PHY_8/136/264/392 phy_per_cs_training_index_X 1bit offset_24 */
mmio_clrsetbits_32(PHY_REG(ch, 8), 0x1 << 24, rank << 24); for (byte = 0; byte < 4; byte++)
mmio_clrsetbits_32(PHY_REG(ch, 136), 0x1 << 24, rank << 24); mmio_clrsetbits_32(PHY_REG(ch, 8 + (128 * byte)), 0x1 << 24,
mmio_clrsetbits_32(PHY_REG(ch, 264), 0x1 << 24, rank << 24); rank << 24);
mmio_clrsetbits_32(PHY_REG(ch, 392), 0x1 << 24, rank << 24);
} }
static __sramfunc void select_per_cs_training_index(uint32_t ch, uint32_t rank) static __sramfunc void select_per_cs_training_index(uint32_t ch, uint32_t rank)
@ -139,19 +140,17 @@ static void override_write_leveling_value(uint32_t ch)
{ {
uint32_t byte; uint32_t byte;
/* for (byte = 0; byte < 4; byte++) {
* PHY_8/136/264/392 /*
* phy_per_cs_training_multicast_en_X 1bit offset_16 * PHY_8/136/264/392
*/ * phy_per_cs_training_multicast_en_X 1bit offset_16
mmio_clrsetbits_32(PHY_REG(ch, 8), 0x1 << 16, 1 << 16); */
mmio_clrsetbits_32(PHY_REG(ch, 136), 0x1 << 16, 1 << 16); mmio_clrsetbits_32(PHY_REG(ch, 8 + (128 * byte)), 0x1 << 16,
mmio_clrsetbits_32(PHY_REG(ch, 264), 0x1 << 16, 1 << 16); 1 << 16);
mmio_clrsetbits_32(PHY_REG(ch, 392), 0x1 << 16, 1 << 16);
for (byte = 0; byte < 4; byte++)
mmio_clrsetbits_32(PHY_REG(ch, 63 + (128 * byte)), mmio_clrsetbits_32(PHY_REG(ch, 63 + (128 * byte)),
0xffff << 16, 0xffff << 16,
0x200 << 16); 0x200 << 16);
}
/* CTL_200 ctrlupd_req 1bit offset_8 */ /* CTL_200 ctrlupd_req 1bit offset_8 */
mmio_clrsetbits_32(CTL_REG(ch, 200), 0x1 << 8, 0x1 << 8); mmio_clrsetbits_32(CTL_REG(ch, 200), 0x1 << 8, 0x1 << 8);