Merge pull request #1363 from antonio-nino-diaz-arm/an/res1-ap

xlat: Set AP[1] to 1 when it is RES1
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danh-arm 2018-05-01 15:31:44 +01:00 committed by GitHub
commit c853dc7e11
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3 changed files with 19 additions and 7 deletions

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@ -107,10 +107,8 @@
* Permissions bits, and does not define an AP[0] bit. * Permissions bits, and does not define an AP[0] bit.
* *
* AP[1] is valid only for a stage 1 translation that supports two VA ranges * AP[1] is valid only for a stage 1 translation that supports two VA ranges
* (i.e. in the ARMv8A.0 architecture, that is the S-EL1&0 regime). * (i.e. in the ARMv8A.0 architecture, that is the S-EL1&0 regime). It is RES1
* * when stage 1 translations can only support one VA range.
* AP[1] is RES0 for stage 1 translations that support only one VA range
* (e.g. EL3).
*/ */
#define AP2_SHIFT U(0x7) #define AP2_SHIFT U(0x7)
#define AP2_RO U(0x1) #define AP2_RO U(0x1)
@ -119,6 +117,7 @@
#define AP1_SHIFT U(0x6) #define AP1_SHIFT U(0x6)
#define AP1_ACCESS_UNPRIVILEGED U(0x1) #define AP1_ACCESS_UNPRIVILEGED U(0x1)
#define AP1_NO_ACCESS_UNPRIVILEGED U(0x0) #define AP1_NO_ACCESS_UNPRIVILEGED U(0x0)
#define AP1_RES1 U(0x1)
/* /*
* The following definitions must all be passed to the LOWER_ATTRS() macro to * The following definitions must all be passed to the LOWER_ATTRS() macro to
@ -128,6 +127,7 @@
#define AP_RW (AP2_RW << 5) #define AP_RW (AP2_RW << 5)
#define AP_ACCESS_UNPRIVILEGED (AP1_ACCESS_UNPRIVILEGED << 4) #define AP_ACCESS_UNPRIVILEGED (AP1_ACCESS_UNPRIVILEGED << 4)
#define AP_NO_ACCESS_UNPRIVILEGED (AP1_NO_ACCESS_UNPRIVILEGED << 4) #define AP_NO_ACCESS_UNPRIVILEGED (AP1_NO_ACCESS_UNPRIVILEGED << 4)
#define AP_ONE_VA_RANGE_RES1 (AP1_RES1 << 4)
#define NS (U(0x1) << 3) #define NS (U(0x1) << 3)
#define ATTR_NON_CACHEABLE_INDEX U(0x2) #define ATTR_NON_CACHEABLE_INDEX U(0x2)
#define ATTR_DEVICE_INDEX U(0x1) #define ATTR_DEVICE_INDEX U(0x1)

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@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
@ -41,6 +41,7 @@ static unsigned long long xlat_max_pa;
static uintptr_t xlat_max_va; static uintptr_t xlat_max_va;
static uint64_t execute_never_mask; static uint64_t execute_never_mask;
static uint64_t ap1_mask;
/* /*
* Array of all memory regions stored in order of ascending base address. * Array of all memory regions stored in order of ascending base address.
@ -195,6 +196,7 @@ static uint64_t mmap_desc(mmap_attr_t attr, unsigned long long addr_pa,
desc |= (attr & MT_NS) ? LOWER_ATTRS(NS) : 0; desc |= (attr & MT_NS) ? LOWER_ATTRS(NS) : 0;
desc |= (attr & MT_RW) ? LOWER_ATTRS(AP_RW) : LOWER_ATTRS(AP_RO); desc |= (attr & MT_RW) ? LOWER_ATTRS(AP_RW) : LOWER_ATTRS(AP_RO);
desc |= LOWER_ATTRS(ACCESS_FLAG); desc |= LOWER_ATTRS(ACCESS_FLAG);
desc |= ap1_mask;
/* /*
* Deduce shareability domain and executability of the memory region * Deduce shareability domain and executability of the memory region
@ -381,7 +383,17 @@ void init_xlation_table(uintptr_t base_va, uint64_t *table,
unsigned int level, uintptr_t *max_va, unsigned int level, uintptr_t *max_va,
unsigned long long *max_pa) unsigned long long *max_pa)
{ {
execute_never_mask = xlat_arch_get_xn_desc(xlat_arch_current_el()); int el = xlat_arch_current_el();
execute_never_mask = xlat_arch_get_xn_desc(el);
if (el == 3) {
ap1_mask = LOWER_ATTRS(AP_ONE_VA_RANGE_RES1);
} else {
assert(el == 1);
ap1_mask = 0;
}
init_xlation_table_inner(mmap, base_va, table, level); init_xlation_table_inner(mmap, base_va, table, level);
*max_va = xlat_max_va; *max_va = xlat_max_va;
*max_pa = xlat_max_pa; *max_pa = xlat_max_pa;

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@ -155,7 +155,7 @@ static uint64_t xlat_desc(const xlat_ctx_t *ctx, uint32_t attr,
} }
} else { } else {
assert(ctx->xlat_regime == EL3_REGIME); assert(ctx->xlat_regime == EL3_REGIME);
desc |= LOWER_ATTRS(AP_NO_ACCESS_UNPRIVILEGED); desc |= LOWER_ATTRS(AP_ONE_VA_RANGE_RES1);
} }
/* /*