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Tegra: introduce delay timer support 

This patch introduces the backend required for implementing the delay
timer API. Tegra has an on-chip free flowing us timer which can be
used as the delay timer.

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
This commit is contained in:
Varun Wadekar 2015-07-16 15:47:03 +05:30
parent 68e2a64181
commit c896132679
4 changed files with 63 additions and 0 deletions
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5
plat/nvidia/tegra/common/tegra_bl31_setup.c
View File

@ -161,6 +161,11 @@ void bl31_platform_setup(void)
{
uint32_t tmp_reg;
/*
* Initialize delay timer
*/
tegra_delay_timer_init();
/*
* Setup secondary CPU POR infrastructure.
*/

2
plat/nvidia/tegra/common/tegra_common.mk
View File

@ -48,6 +48,7 @@ COMMON_DIR := plat/nvidia/tegra/common
BL31_SOURCES += drivers/arm/gic/gic_v2.c \
drivers/arm/gic/gic_v3.c \
drivers/console/console.S \
drivers/delay_timer/delay_timer.c \
drivers/ti/uart/16550_console.S \
lib/cpus/aarch64/cortex_a53.S \
lib/cpus/aarch64/cortex_a57.S \
@ -57,6 +58,7 @@ BL31_SOURCES += drivers/arm/gic/gic_v2.c \
${COMMON_DIR}/drivers/pmc/pmc.c \
${COMMON_DIR}/drivers/flowctrl/flowctrl.c \
${COMMON_DIR}/tegra_bl31_setup.c \
${COMMON_DIR}/tegra_delay_timer.c \
${COMMON_DIR}/tegra_gic.c \
${COMMON_DIR}/tegra_pm.c \
${COMMON_DIR}/tegra_sip_calls.c \

53
plat/nvidia/tegra/common/tegra_delay_timer.c Normal file
View File

@ -0,0 +1,53 @@
/*
* Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* Neither the name of ARM nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific
* prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <delay_timer.h>
#include <mmio.h>
#include <tegra_def.h>
static uint32_t tegra_timerus_get_value(void)
{
return mmio_read_32(TEGRA_TMRUS_BASE);
}
static const timer_ops_t tegra_timer_ops = {
.get_timer_value = tegra_timerus_get_value,
.clk_mult = 1,
.clk_div = 1,
};
/*
* Initialise the on-chip free rolling us counter as the delay
* timer.
*/
void tegra_delay_timer_init(void)
{
timer_init(&tegra_timer_ops);
}

3
plat/nvidia/tegra/include/tegra_private.h
View File

@ -74,4 +74,7 @@ int tegra_prepare_cpu_on_finish(unsigned long mpidr);
plat_params_from_bl2_t *bl31_get_plat_params(void);
int bl31_check_ns_address(uint64_t base, uint64_t size_in_bytes);
/* Declarations for tegra_delay_timer.c */
void tegra_delay_timer_init(void);
#endif /* __TEGRA_PRIVATE_H__ */