hikey960: enable IOMCU DMAC
There exists a third DMA controller on the hi3660 SoC called the IOMCU DMAC. This controller is used by peripherals like SPI2 and UART3. Initialize channels 4-7 as non-secure, while 0-3 remain reserved and secure. Signed-off-by: Ryan Grachek <ryan@edited.us>
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@ -141,6 +141,21 @@ static void hikey960_edma_init(void)
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}
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}
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static void hikey960_iomcu_dma_init(void)
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{
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int i;
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uint32_t non_secure;
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non_secure = IOMCU_DMAC_SEC_CTRL_INTR_SEC | IOMCU_DMAC_SEC_CTRL_GLOBAL_SEC;
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mmio_write_32(IOMCU_DMAC_SEC_CTRL, non_secure);
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/* channels 0-3 are reserved */
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for (i = 4; i < IOMCU_DMAC_CHANNEL_NUMS; i++) {
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mmio_write_32(IOMCU_DMAC_AXI_CONF(i), IOMCU_DMAC_AXI_CONF_ARPROT_NS |
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IOMCU_DMAC_AXI_CONF_AWPROT_NS);
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}
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}
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void bl31_platform_setup(void)
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{
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/* Initialize the GIC driver, cpu and distributor interfaces */
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@ -150,6 +165,7 @@ void bl31_platform_setup(void)
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gicv2_cpuif_enable();
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hikey960_edma_init();
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hikey960_iomcu_dma_init();
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hisi_ipc_init();
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}
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@ -373,4 +373,13 @@
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#define EDMAC_SEC_CTRL_GLOBAL_SEC (1 << 0)
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#define EDMAC_CHANNEL_NUMS 16
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#define IOMCU_DMAC_BASE 0xffd77000
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#define IOMCU_DMAC_SEC_CTRL (IOMCU_DMAC_BASE + 0x694)
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#define IOMCU_DMAC_AXI_CONF(x) (IOMCU_DMAC_BASE + 0x820 + ((x) << 6))
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#define IOMCU_DMAC_AXI_CONF_ARPROT_NS (1 << 6)
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#define IOMCU_DMAC_AXI_CONF_AWPROT_NS (1 << 18)
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#define IOMCU_DMAC_SEC_CTRL_INTR_SEC (1 << 1)
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#define IOMCU_DMAC_SEC_CTRL_GLOBAL_SEC (1 << 0)
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#define IOMCU_DMAC_CHANNEL_NUMS 8
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#endif /* HI3660_H */
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