Mark GICV3, CCI and CCN boot time code as init

Mark the GICv3, CCI and CCN code only used in Bl31 initialization
with __init to be reclaimed once no longer needed.

Change-Id: I3d77f36758450d9d1d87ecc60bc1c63fe4082667
Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
This commit is contained in:
Daniel Boulby 2018-09-18 13:36:39 +01:00 committed by Antonio Nino Diaz
parent aff2863fe6
commit c9263e62a7
7 changed files with 18 additions and 16 deletions

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@ -107,7 +107,8 @@ static int get_slave_ports(unsigned int part_num)
}
#endif /* ENABLE_ASSERTIONS */
void cci_init(uintptr_t base, const int *map, unsigned int num_cci_masters)
void __init cci_init(uintptr_t base, const int *map,
unsigned int num_cci_masters)
{
assert(map != NULL);
assert(base != 0U);

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -167,7 +167,7 @@ static unsigned int ccn_get_rn_master_info(uintptr_t periphbase,
* It compares this with the information provided by the platform to determine
* the validity of the latter.
******************************************************************************/
static void ccn_validate_plat_params(const ccn_desc_t *plat_desc)
static void __init ccn_validate_plat_params(const ccn_desc_t *plat_desc)
{
unsigned int master_id, num_rn_masters;
rn_info_t info = { {0} };
@ -208,7 +208,7 @@ static void ccn_validate_plat_params(const ccn_desc_t *plat_desc)
* simultaneous CCN operations at runtime (only BL31) to add and remove Request
* nodes from coherency.
******************************************************************************/
void ccn_init(const ccn_desc_t *plat_desc)
void __init ccn_init(const ccn_desc_t *plat_desc)
{
#if ENABLE_ASSERTIONS
ccn_validate_plat_params(plat_desc);

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@ -55,7 +55,7 @@ static spinlock_t gic_lock;
* This function initialises the ARM GICv3 driver in EL3 with provided platform
* inputs.
******************************************************************************/
void gicv3_driver_init(const gicv3_driver_data_t *plat_driver_data)
void __init gicv3_driver_init(const gicv3_driver_data_t *plat_driver_data)
{
unsigned int gic_version;
@ -129,7 +129,7 @@ void gicv3_driver_init(const gicv3_driver_data_t *plat_driver_data)
* This function initialises the GIC distributor interface based upon the data
* provided by the platform while initialising the driver.
******************************************************************************/
void gicv3_distif_init(void)
void __init gicv3_distif_init(void)
{
unsigned int bitmap = 0;

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@ -4,21 +4,22 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <cdefs.h>
#include <mmio.h>
#include <smmu_v3.h>
#include <stdbool.h>
static inline uint32_t smmuv3_read_s_idr1(uintptr_t base)
static inline uint32_t __init smmuv3_read_s_idr1(uintptr_t base)
{
return mmio_read_32(base + SMMU_S_IDR1);
}
static inline uint32_t smmuv3_read_s_init(uintptr_t base)
static inline uint32_t __init smmuv3_read_s_init(uintptr_t base)
{
return mmio_read_32(base + SMMU_S_INIT);
}
static inline void smmuv3_write_s_init(uintptr_t base, uint32_t value)
static inline void __init smmuv3_write_s_init(uintptr_t base, uint32_t value)
{
mmio_write_32(base + SMMU_S_INIT, value);
}
@ -34,7 +35,7 @@ static inline bool smmuv3_inval_pending(uintptr_t base)
*
* Returns 0 on success, and -1 on failure.
*/
int smmuv3_init(uintptr_t smmu_base)
int __init smmuv3_init(uintptr_t smmu_base)
{
uint32_t idr1_reg;

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -27,7 +27,7 @@ static const int cci_map[] = {
/******************************************************************************
* Helper function to initialize ARM CCI driver.
*****************************************************************************/
void plat_arm_interconnect_init(void)
void __init plat_arm_interconnect_init(void)
{
cci_init(PLAT_ARM_CCI_BASE, cci_map, ARRAY_SIZE(cci_map));
}

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@ -1,5 +1,5 @@
/*
* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -34,7 +34,7 @@ CASSERT(PLAT_ARM_CLUSTER_COUNT == ARRAY_SIZE(master_to_rn_id_map),
/******************************************************************************
* Helper function to initialize ARM CCN driver.
*****************************************************************************/
void plat_arm_interconnect_init(void)
void __init plat_arm_interconnect_init(void)
{
ccn_init(&arm_ccn_desc);
}

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@ -68,7 +68,7 @@ static const gicv3_driver_data_t arm_gic_data __unused = {
.mpidr_to_core_pos = arm_gicv3_mpidr_hash
};
void plat_arm_gic_driver_init(void)
void __init plat_arm_gic_driver_init(void)
{
/*
* The GICv3 driver is initialized in EL3 and does not need
@ -85,7 +85,7 @@ void plat_arm_gic_driver_init(void)
/******************************************************************************
* ARM common helper to initialize the GIC. Only invoked by BL31
*****************************************************************************/
void plat_arm_gic_init(void)
void __init plat_arm_gic_init(void)
{
gicv3_distif_init();
gicv3_rdistif_init(plat_my_core_pos());