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Merge changes from topic "rpix-multi-console" into integration 

* changes:
  rpi: docs: Update maintainers file to new RPi directory scheme
  rpi: console: Autodetect Mini-UART vs. PL011 configuration
  rpi3: build: Include GPIO driver in all BL stages
  rpi: Allow using PL011 UART for RPi3/RPi4
  rpi3: console: Use same "clock-less" setup scheme as RPi4
  rpi3: gpio: Simplify GPIO setup
This commit is contained in:
Sandrine Bailleux 2020-03-18 16:44:40 +00:00 committed by TrustedFirmware Code Review
parent ea32cf5049 9aaae8e671
commit c979685271
17 changed files with 87 additions and 71 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
docs/about/maintainers.rst
View File

@ -217,6 +217,17 @@ Raspberry Pi 3 platform port
:G: `grandpaul`_
:F: docs/plat/rpi3.rst
:F: plat/rpi/rpi3/
:F: plat/rpi/common/
:F: drivers/rpi3/
:F: include/drivers/rpi3/
Raspberry Pi 4 platform port
----------------------------
:M: Andre Przywara <andre.przywara@arm.com>
:G: `Andre-ARM`_
:F: docs/plat/rpi4.rst
:F: plat/rpi/rpi4/
:F: plat/rpi/common/
:F: drivers/rpi3/
:F: include/drivers/rpi3/

12
drivers/rpi3/gpio/rpi3_gpio.c
View File

@ -11,7 +11,7 @@
#include <drivers/delay_timer.h>
#include <drivers/rpi3/gpio/rpi3_gpio.h>
static struct rpi3_gpio_params rpi3_gpio_params;
static uintptr_t reg_base;
static int rpi3_gpio_get_direction(int gpio);
static void rpi3_gpio_set_direction(int gpio, int direction);
@ -43,7 +43,6 @@ static const gpio_ops_t rpi3_gpio_ops = {
int rpi3_gpio_get_select(int gpio)
{
int ret;
uintptr_t reg_base = rpi3_gpio_params.reg_base;
int regN = gpio / 10;
int shift = 3 * (gpio % 10);
uintptr_t reg_sel = reg_base + RPI3_GPIO_GPFSEL(regN);
@ -69,7 +68,6 @@ int rpi3_gpio_get_select(int gpio)
*/
void rpi3_gpio_set_select(int gpio, int fsel)
{
uintptr_t reg_base = rpi3_gpio_params.reg_base;
int regN = gpio / 10;
int shift = 3 * (gpio % 10);
uintptr_t reg_sel = reg_base + RPI3_GPIO_GPFSEL(regN);
@ -106,7 +104,6 @@ static void rpi3_gpio_set_direction(int gpio, int direction)
static int rpi3_gpio_get_value(int gpio)
{
uintptr_t reg_base = rpi3_gpio_params.reg_base;
int regN = gpio / 32;
int shift = gpio % 32;
uintptr_t reg_lev = reg_base + RPI3_GPIO_GPLEV(regN);
@ -119,7 +116,6 @@ static int rpi3_gpio_get_value(int gpio)
static void rpi3_gpio_set_value(int gpio, int value)
{
uintptr_t reg_base = rpi3_gpio_params.reg_base;
int regN = gpio / 32;
int shift = gpio % 32;
uintptr_t reg_set = reg_base + RPI3_GPIO_GPSET(regN);
@ -137,7 +133,6 @@ static void rpi3_gpio_set_value(int gpio, int value)
static void rpi3_gpio_set_pull(int gpio, int pull)
{
uintptr_t reg_base = rpi3_gpio_params.reg_base;
int regN = gpio / 32;
int shift = gpio % 32;
uintptr_t reg_pud = reg_base + RPI3_GPIO_GPPUD;
@ -161,9 +156,8 @@ static void rpi3_gpio_set_pull(int gpio, int pull)
mmio_write_32(reg_pud, 0x0);
}
void rpi3_gpio_init(struct rpi3_gpio_params *params)
void rpi3_gpio_init(void)
{
assert(params != 0);
memcpy(&rpi3_gpio_params, params, sizeof(struct rpi3_gpio_params));
reg_base = RPI3_GPIO_BASE;
gpio_init(&rpi3_gpio_ops);
}

6
include/drivers/rpi3/gpio/rpi3_gpio.h
View File

@ -11,11 +11,7 @@
#include <stdint.h>
#include <drivers/gpio.h>
struct rpi3_gpio_params {
uintptr_t reg_base;
};
void rpi3_gpio_init(struct rpi3_gpio_params *params);
void rpi3_gpio_init(void);
int rpi3_gpio_get_select(int gpio);
void rpi3_gpio_set_select(int gpio, int fsel);

2
plat/rpi/common/include/rpi_shared.h
View File

@ -14,7 +14,7 @@
******************************************************************************/
/* Utility functions */
void rpi3_console_init(unsigned int base_clk_rate);
void rpi3_console_init(void);
void rpi3_setup_page_tables(uintptr_t total_base, size_t total_size,
uintptr_t code_start, uintptr_t code_limit,
uintptr_t rodata_start, uintptr_t rodata_limit

35
plat/rpi/common/rpi3_common.c
View File

@ -13,7 +13,9 @@
#include <common/debug.h>
#include <bl31/interrupt_mgmt.h>
#include <drivers/console.h>
#include <drivers/rpi3/gpio/rpi3_gpio.h>
#include <drivers/ti/uart/uart_16550.h>
#include <drivers/arm/pl011.h>
#include <lib/xlat_tables/xlat_tables_v2.h>
#include <rpi_hw.h>
@ -104,16 +106,33 @@ static const mmap_region_t plat_rpi3_mmap[] = {
******************************************************************************/
static console_t rpi3_console;
void rpi3_console_init(unsigned int base_clk_rate)
static bool rpi3_use_mini_uart(void)
{
return rpi3_gpio_get_select(14) == RPI3_GPIO_FUNC_ALT5;
}
void rpi3_console_init(void)
{
int console_scope = CONSOLE_FLAG_BOOT;
#if RPI3_RUNTIME_UART != -1
console_scope |= CONSOLE_FLAG_RUNTIME;
#endif
int rc = console_16550_register(PLAT_RPI3_UART_BASE,
base_clk_rate,
PLAT_RPI3_UART_BAUDRATE,
&rpi3_console);
int rc;
if (RPI3_RUNTIME_UART != -1)
console_scope |= CONSOLE_FLAG_RUNTIME;
rpi3_gpio_init();
if (rpi3_use_mini_uart())
rc = console_16550_register(PLAT_RPI_MINI_UART_BASE,
0,
PLAT_RPI_UART_BAUDRATE,
&rpi3_console);
else
rc = console_pl011_register(PLAT_RPI_PL011_UART_BASE,
PLAT_RPI_PL011_UART_CLOCK,
PLAT_RPI_UART_BAUDRATE,
&rpi3_console);
if (rc == 0) {
/*
* The crash console doesn't use the multi console API, it uses

12
plat/rpi/rpi3/aarch64/plat_helpers.S
View File

@ -9,8 +9,6 @@
#include <assert_macros.S>
#include <platform_def.h>
#include "../include/rpi_hw.h"
.globl plat_crash_console_flush
.globl plat_crash_console_init
.globl plat_crash_console_putc
@ -133,9 +131,9 @@ endfunc platform_mem_init
* ---------------------------------------------
*/
func plat_crash_console_init
mov_imm x0, PLAT_RPI3_UART_BASE
mov_imm x1, PLAT_RPI3_UART_CLK_IN_HZ
mov_imm x2, PLAT_RPI3_UART_BAUDRATE
mov_imm x0, PLAT_RPI_MINI_UART_BASE
mov x1, xzr
mov x2, xzr
b console_16550_core_init
endfunc plat_crash_console_init
@ -147,7 +145,7 @@ endfunc plat_crash_console_init
* ---------------------------------------------
*/
func plat_crash_console_putc
mov_imm x1, PLAT_RPI3_UART_BASE
mov_imm x1, PLAT_RPI_MINI_UART_BASE
b console_16550_core_putc
endfunc plat_crash_console_putc
@ -160,6 +158,6 @@ endfunc plat_crash_console_putc
* ---------------------------------------------
*/
func plat_crash_console_flush
mov_imm x0, PLAT_RPI3_UART_BASE
mov_imm x0, PLAT_RPI_MINI_UART_BASE
b console_16550_core_flush
endfunc plat_crash_console_flush

7
plat/rpi/rpi3/include/platform_def.h
View File

@ -249,9 +249,10 @@
/*
* Serial-related constants.
*/
#define PLAT_RPI3_UART_BASE RPI3_MINI_UART_BASE
#define PLAT_RPI3_UART_CLK_IN_HZ RPI3_MINI_UART_CLK_IN_HZ
#define PLAT_RPI3_UART_BAUDRATE ULL(115200)
#define PLAT_RPI_MINI_UART_BASE RPI3_MINI_UART_BASE
#define PLAT_RPI_PL011_UART_BASE RPI3_PL011_UART_BASE
#define PLAT_RPI_PL011_UART_CLOCK RPI3_PL011_UART_CLOCK
#define PLAT_RPI_UART_BAUDRATE ULL(115200)
/*
* System counter

8
plat/rpi/rpi3/include/rpi_hw.h
View File

@ -77,11 +77,15 @@
#define RPI3_RNG_INT_MASK_DISABLE U(0x1)
/*
* Serial port (called 'Mini UART' in the BCM docucmentation).
* Serial ports:
* 'Mini UART' in the BCM docucmentation is the 8250 compatible UART.
* There is also a PL011 UART, multiplexed to the same pins.
*/
#define RPI3_IO_MINI_UART_OFFSET ULL(0x00215040)
#define RPI3_MINI_UART_BASE (RPI_IO_BASE + RPI3_IO_MINI_UART_OFFSET)
#define RPI3_MINI_UART_CLK_IN_HZ ULL(500000000)
#define RPI3_IO_PL011_UART_OFFSET ULL(0x00201000)
#define RPI3_PL011_UART_BASE (RPI_IO_BASE + RPI3_IO_PL011_UART_OFFSET)
#define RPI3_PL011_UART_CLOCK ULL(48000000)
/*
* GPIO controller

7
plat/rpi/rpi3/platform.mk
View File

@ -11,6 +11,10 @@ PLAT_INCLUDES := -Iplat/rpi/common/include \
-Iplat/rpi/rpi3/include
PLAT_BL_COMMON_SOURCES := drivers/ti/uart/aarch64/16550_console.S \
drivers/arm/pl011/aarch64/pl011_console.S \
drivers/gpio/gpio.c \
drivers/delay_timer/delay_timer.c \
drivers/rpi3/gpio/rpi3_gpio.c \
plat/rpi/common/rpi3_common.c \
${XLAT_TABLES_LIB_SRCS}
@ -29,10 +33,7 @@ BL2_SOURCES += common/desc_image_load.c \
drivers/io/io_fip.c \
drivers/io/io_memmap.c \
drivers/io/io_storage.c \
drivers/gpio/gpio.c \
drivers/delay_timer/delay_timer.c \
drivers/delay_timer/generic_delay_timer.c \
drivers/rpi3/gpio/rpi3_gpio.c \
drivers/io/io_block.c \
drivers/mmc/mmc.c \
drivers/rpi3/sdhost/rpi3_sdhost.c \

2
plat/rpi/rpi3/rpi3_bl1_setup.c
View File

@ -35,7 +35,7 @@ void bl1_early_platform_setup(void)
0x80000000);
/* Initialize the console to provide early debug support */
rpi3_console_init(PLAT_RPI3_UART_CLK_IN_HZ);
rpi3_console_init();
/* Allow BL1 to see the whole Trusted RAM */
bl1_tzram_layout.total_base = BL_RAM_BASE;

15
plat/rpi/rpi3/rpi3_bl2_setup.c
View File

@ -24,17 +24,6 @@
/* Data structure which holds the extents of the trusted SRAM for BL2 */
static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE);
/* rpi3 GPIO setup function. */
static void rpi3_gpio_setup(void)
{
struct rpi3_gpio_params params;
memset(&params, 0, sizeof(struct rpi3_gpio_params));
params.reg_base = RPI3_GPIO_BASE;
rpi3_gpio_init(&params);
}
/* Data structure which holds the MMC info */
static struct mmc_device_info mmc_info;
@ -62,13 +51,13 @@ void bl2_early_platform_setup2(u_register_t arg0, u_register_t arg1,
meminfo_t *mem_layout = (meminfo_t *) arg1;
/* Initialize the console to provide early debug support */
rpi3_console_init(PLAT_RPI3_UART_CLK_IN_HZ);
rpi3_console_init();
/* Enable arch timer */
generic_delay_timer_init();
/* Setup GPIO driver */
rpi3_gpio_setup();
rpi3_gpio_init();
/* Setup the BL2 memory layout */
bl2_tzram_layout = *mem_layout;

2
plat/rpi/rpi3/rpi3_bl31_setup.c
View File

@ -72,7 +72,7 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
{
/* Initialize the console to provide early debug support */
rpi3_console_init(PLAT_RPI3_UART_CLK_IN_HZ);
rpi3_console_init();
/*
* In debug builds, a special value is passed in 'arg1' to verify

8
plat/rpi/rpi4/aarch64/plat_helpers.S
View File

@ -10,8 +10,6 @@
#include <platform_def.h>
#include <cortex_a72.h>
#include "../include/rpi_hw.h"
.globl plat_crash_console_flush
.globl plat_crash_console_init
.globl plat_crash_console_putc
@ -135,7 +133,7 @@ endfunc platform_mem_init
* ---------------------------------------------
*/
func plat_crash_console_init
mov_imm x0, PLAT_RPI3_UART_BASE
mov_imm x0, PLAT_RPI_MINI_UART_BASE
mov x1, xzr
mov x2, xzr
b console_16550_core_init
@ -149,7 +147,7 @@ endfunc plat_crash_console_init
* ---------------------------------------------
*/
func plat_crash_console_putc
mov_imm x1, PLAT_RPI3_UART_BASE
mov_imm x1, PLAT_RPI_MINI_UART_BASE
b console_16550_core_putc
endfunc plat_crash_console_putc
@ -162,7 +160,7 @@ endfunc plat_crash_console_putc
* ---------------------------------------------
*/
func plat_crash_console_flush
mov_imm x0, PLAT_RPI3_UART_BASE
mov_imm x0, PLAT_RPI_MINI_UART_BASE
b console_16550_core_flush
endfunc plat_crash_console_flush

6
plat/rpi/rpi4/include/platform_def.h
View File

@ -126,8 +126,10 @@
/*
* Serial-related constants.
*/
#define PLAT_RPI3_UART_BASE RPI3_MINI_UART_BASE
#define PLAT_RPI3_UART_BAUDRATE ULL(115200)
#define PLAT_RPI_MINI_UART_BASE RPI4_MINI_UART_BASE
#define PLAT_RPI_PL011_UART_BASE RPI4_PL011_UART_BASE
#define PLAT_RPI_PL011_UART_CLOCK RPI4_PL011_UART_CLOCK
#define PLAT_RPI_UART_BAUDRATE ULL(115200)
/*
* System counter

11
plat/rpi/rpi4/include/rpi_hw.h
View File

@ -77,10 +77,15 @@
#define RPI3_RNG_INT_MASK_DISABLE U(0x1)
/*
* Serial port (called 'Mini UART' in the Broadcom documentation).
* Serial ports:
* 'Mini UART' in the BCM docucmentation is the 8250 compatible UART.
* There is also a PL011 UART, multiplexed to the same pins.
*/
#define RPI3_IO_MINI_UART_OFFSET ULL(0x00215040)
#define RPI3_MINI_UART_BASE (RPI_IO_BASE + RPI3_IO_MINI_UART_OFFSET)
#define RPI4_IO_MINI_UART_OFFSET ULL(0x00215040)
#define RPI4_MINI_UART_BASE (RPI_IO_BASE + RPI4_IO_MINI_UART_OFFSET)
#define RPI4_IO_PL011_UART_OFFSET ULL(0x00201000)
#define RPI4_PL011_UART_BASE (RPI_IO_BASE + RPI4_IO_PL011_UART_OFFSET)
#define RPI4_PL011_UART_CLOCK ULL(48000000)
/*
* GPIO controller

4
plat/rpi/rpi4/platform.mk
View File

@ -11,6 +11,7 @@ PLAT_INCLUDES := -Iplat/rpi/common/include \
-Iplat/rpi/rpi4/include
PLAT_BL_COMMON_SOURCES := drivers/ti/uart/aarch64/16550_console.S \
drivers/arm/pl011/aarch64/pl011_console.S \
plat/rpi/common/rpi3_common.c \
${XLAT_TABLES_LIB_SRCS}
@ -20,6 +21,9 @@ BL31_SOURCES += lib/cpus/aarch64/cortex_a72.S \
drivers/arm/gic/common/gic_common.c \
drivers/arm/gic/v2/gicv2_helpers.c \
drivers/arm/gic/v2/gicv2_main.c \
drivers/delay_timer/delay_timer.c \
drivers/gpio/gpio.c \
drivers/rpi3/gpio/rpi3_gpio.c \
plat/common/plat_gicv2.c \
plat/rpi/rpi4/rpi4_bl31_setup.c \
plat/rpi/common/rpi3_pm.c \

10
plat/rpi/rpi4/rpi4_bl31_setup.c
View File

@ -132,14 +132,8 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
/* Early GPU firmware revisions need a little break here. */
ldelay(100000);
/*
* Initialize the console to provide early debug support.
* We rely on the GPU firmware to have initialised the UART correctly,
* as the baud base clock rate differs across GPU firmware revisions.
* Providing a base clock of 0 lets the 16550 UART init routine skip
* the initial enablement and baud rate setup.
*/
rpi3_console_init(0);
/* Initialize the console to provide early debug support. */
rpi3_console_init();
bl33_image_ep_info.pc = plat_get_ns_image_entrypoint();
bl33_image_ep_info.spsr = rpi3_get_spsr_for_bl33_entry();