PSCI: Update comment on MMU disablement
The MMU is not disabled in this path, update the comment to reflect this. Also clarify that both paths call prepare_cpu_pwr_dwn(), but the second path does stack cache maintenance. Signed-off-by: Andrew F. Davis <afd@ti.com>
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@ -948,21 +948,18 @@ void psci_do_pwrdown_sequence(unsigned int power_level)
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/*
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/*
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* With hardware-assisted coherency, the CPU drivers only initiate the
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* With hardware-assisted coherency, the CPU drivers only initiate the
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* power down sequence, without performing cache-maintenance operations
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* power down sequence, without performing cache-maintenance operations
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* in software. Data caches and MMU remain enabled both before and after
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* in software. Data caches enabled both before and after this call.
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* this call.
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*/
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*/
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prepare_cpu_pwr_dwn(power_level);
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prepare_cpu_pwr_dwn(power_level);
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#else
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#else
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/*
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/*
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* Without hardware-assisted coherency, the CPU drivers disable data
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* Without hardware-assisted coherency, the CPU drivers disable data
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* caches and MMU, then perform cache-maintenance operations in
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* caches, then perform cache-maintenance operations in software.
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* software.
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*
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*
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* We ought to call prepare_cpu_pwr_dwn() to initiate power down
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* This also calls prepare_cpu_pwr_dwn() to initiate power down
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* sequence. We currently have data caches and MMU enabled, but the
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* sequence, but that function will return with data caches disabled.
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* function will return with data caches and MMU disabled. We must
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* We must ensure that the stack memory is flushed out to memory before
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* ensure that the stack memory is flushed out to memory before we start
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* we start popping from it again.
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* popping from it again.
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*/
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*/
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psci_do_pwrdown_cache_maintenance(power_level);
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psci_do_pwrdown_cache_maintenance(power_level);
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#endif
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#endif
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