Merge pull request #344 from vwadekar/tegra-mselect-restore-v2

Tegra210: enable WRAP to INCR burst type conversions
This commit is contained in:
danh-arm 2015-07-28 15:14:42 +01:00
commit c9af52e1b6
2 changed files with 28 additions and 0 deletions

View File

@ -67,6 +67,23 @@
#define TEGRA_GICD_BASE 0x50041000
#define TEGRA_GICC_BASE 0x50042000
/*******************************************************************************
* Tegra Memory Select Switch Controller constants
******************************************************************************/
#define TEGRA_MSELECT_BASE 0x50060000
#define MSELECT_CONFIG 0x0
#define ENABLE_WRAP_INCR_MASTER2_BIT (1 << 29)
#define ENABLE_WRAP_INCR_MASTER1_BIT (1 << 28)
#define ENABLE_WRAP_INCR_MASTER0_BIT (1 << 27)
#define UNSUPPORTED_TX_ERR_MASTER2_BIT (1 << 25)
#define UNSUPPORTED_TX_ERR_MASTER1_BIT (1 << 24)
#define ENABLE_UNSUP_TX_ERRORS (UNSUPPORTED_TX_ERR_MASTER2_BIT | \
UNSUPPORTED_TX_ERR_MASTER1_BIT)
#define ENABLE_WRAP_TO_INCR_BURSTS (ENABLE_WRAP_INCR_MASTER2_BIT | \
ENABLE_WRAP_INCR_MASTER1_BIT | \
ENABLE_WRAP_INCR_MASTER0_BIT)
/*******************************************************************************
* Tegra micro-seconds timer constants
******************************************************************************/

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@ -120,11 +120,22 @@ int tegra_soc_prepare_cpu_suspend(unsigned int id, unsigned int afflvl)
int tegra_soc_prepare_cpu_on_finish(unsigned long mpidr)
{
uint32_t val;
/*
* Check if we are exiting from SOC_POWERDN.
*/
if (tegra_system_suspended()) {
/*
* Enable WRAP to INCR burst type conversions for
* incoming requests on the AXI slave ports.
*/
val = mmio_read_32(TEGRA_MSELECT_BASE + MSELECT_CONFIG);
val &= ~ENABLE_UNSUP_TX_ERRORS;
val |= ENABLE_WRAP_TO_INCR_BURSTS;
mmio_write_32(TEGRA_MSELECT_BASE + MSELECT_CONFIG, val);
/*
* Restore Boot and Power Management Processor (BPMP) reset
* address and reset it.