Merge pull request #344 from vwadekar/tegra-mselect-restore-v2
Tegra210: enable WRAP to INCR burst type conversions
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commit
c9af52e1b6
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@ -67,6 +67,23 @@
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#define TEGRA_GICD_BASE 0x50041000
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#define TEGRA_GICC_BASE 0x50042000
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/*******************************************************************************
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* Tegra Memory Select Switch Controller constants
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******************************************************************************/
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#define TEGRA_MSELECT_BASE 0x50060000
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#define MSELECT_CONFIG 0x0
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#define ENABLE_WRAP_INCR_MASTER2_BIT (1 << 29)
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#define ENABLE_WRAP_INCR_MASTER1_BIT (1 << 28)
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#define ENABLE_WRAP_INCR_MASTER0_BIT (1 << 27)
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#define UNSUPPORTED_TX_ERR_MASTER2_BIT (1 << 25)
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#define UNSUPPORTED_TX_ERR_MASTER1_BIT (1 << 24)
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#define ENABLE_UNSUP_TX_ERRORS (UNSUPPORTED_TX_ERR_MASTER2_BIT | \
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UNSUPPORTED_TX_ERR_MASTER1_BIT)
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#define ENABLE_WRAP_TO_INCR_BURSTS (ENABLE_WRAP_INCR_MASTER2_BIT | \
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ENABLE_WRAP_INCR_MASTER1_BIT | \
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ENABLE_WRAP_INCR_MASTER0_BIT)
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/*******************************************************************************
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* Tegra micro-seconds timer constants
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******************************************************************************/
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@ -120,11 +120,22 @@ int tegra_soc_prepare_cpu_suspend(unsigned int id, unsigned int afflvl)
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int tegra_soc_prepare_cpu_on_finish(unsigned long mpidr)
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{
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uint32_t val;
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/*
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* Check if we are exiting from SOC_POWERDN.
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*/
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if (tegra_system_suspended()) {
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/*
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* Enable WRAP to INCR burst type conversions for
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* incoming requests on the AXI slave ports.
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*/
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val = mmio_read_32(TEGRA_MSELECT_BASE + MSELECT_CONFIG);
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val &= ~ENABLE_UNSUP_TX_ERRORS;
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val |= ENABLE_WRAP_TO_INCR_BURSTS;
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mmio_write_32(TEGRA_MSELECT_BASE + MSELECT_CONFIG, val);
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/*
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* Restore Boot and Power Management Processor (BPMP) reset
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* address and reset it.
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