From c9c070994caedf123212aad23b6942122c5dd793 Mon Sep 17 00:00:00 2001 From: Siew Chin Lim Date: Sat, 10 Jul 2021 00:55:35 +0800 Subject: [PATCH] fix(intel): fix bit masking issue in intel_secure_reg_update intel_secure_reg_update function should apply mask to the value before write into register. Signed-off-by: Siew Chin Lim Change-Id: I84bbd06e24b8666528b53030e8359743d438eb5b --- plat/intel/soc/common/socfpga_sip_svc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/plat/intel/soc/common/socfpga_sip_svc.c b/plat/intel/soc/common/socfpga_sip_svc.c index 529bbbce6..66dd6cd9e 100644 --- a/plat/intel/soc/common/socfpga_sip_svc.c +++ b/plat/intel/soc/common/socfpga_sip_svc.c @@ -344,7 +344,7 @@ uint32_t intel_secure_reg_update(uint64_t reg_addr, uint32_t mask, { if (!intel_secure_reg_read(reg_addr, retval)) { *retval &= ~mask; - *retval |= val; + *retval |= val & mask; return intel_secure_reg_write(reg_addr, *retval, retval); }