From ca661a0092c8ead5ac7df57c55fffcc835d9c0b9 Mon Sep 17 00:00:00 2001 From: Madhukar Pappireddy Date: Mon, 23 Dec 2019 14:49:52 -0600 Subject: [PATCH] Enable -Wredundant-decls warning check This flag warns if anything is declared more than once in the same scope, even in cases where multiple declaration is valid and changes nothing. Consequently, this patch also fixes the issues reported by this flag. Consider the following two lines of code from two different source files(bl_common.h and bl31_plat_setup.c): IMPORT_SYM(uintptr_t, __RO_START__, BL_CODE_BASE); IMPORT_SYM(unsigned long, __RO_START__, BL2_RO_BASE); The IMPORT_SYM macro which actually imports a linker symbol as a C expression. The macro defines the __RO_START__ as an extern variable twice, one for each instance. __RO_START__ symbol is defined by the linker script to mark the start of the Read-Only area of the memory map. Essentially, the platform code redefines the linker symbol with a different (relevant) name rather than using the standard symbol. A simple solution to fix this issue in the platform code for redundant declarations warning is to remove the second IMPORT_SYM and replace it with following assignment static const unsigned long BL2_RO_BASE = BL_CODE_BASE; Change-Id: If4835d1ee462d52b75e5afd2a59b64828707c5aa Signed-off-by: Madhukar Pappireddy --- Makefile | 3 +-- plat/imx/imx8qm/imx8qm_bl31_setup.c | 13 +++++++------ plat/imx/imx8qx/imx8qx_bl31_setup.c | 13 +++++++------ .../common/include/socfpga_system_manager.h | 3 +-- plat/nvidia/tegra/common/tegra_bl31_setup.c | 13 +++++++------ .../soc/t194/drivers/include/mce_private.h | 1 - plat/renesas/rcar/bl2_plat_setup.c | 17 ++++++++++++----- plat/renesas/rcar/bl31_plat_setup.c | 10 +++++----- .../st/stm32mp1/include/stm32mp1_boot_device.h | 18 ------------------ plat/st/stm32mp1/stm32mp1_boot_device.c | 3 +++ plat/st/stm32mp1/stm32mp1_def.h | 1 - 11 files changed, 43 insertions(+), 52 deletions(-) delete mode 100644 plat/st/stm32mp1/include/stm32mp1_boot_device.h diff --git a/Makefile b/Makefile index bd52c0bd7..34e695e0d 100644 --- a/Makefile +++ b/Makefile @@ -255,7 +255,7 @@ ASFLAGS_aarch64 = $(march64-directive) # General warnings WARNINGS := -Wall -Wmissing-include-dirs -Wunused \ -Wdisabled-optimization -Wvla -Wshadow \ - -Wno-unused-parameter + -Wno-unused-parameter -Wredundant-decls # Additional warnings # Level 1 @@ -274,7 +274,6 @@ WARNING3 += -Wcast-qual WARNING3 += -Wconversion WARNING3 += -Wpacked WARNING3 += -Wpointer-arith -WARNING3 += -Wredundant-decls WARNING3 += -Wswitch-default ifeq (${W},1) diff --git a/plat/imx/imx8qm/imx8qm_bl31_setup.c b/plat/imx/imx8qm/imx8qm_bl31_setup.c index c76de6461..9232cbc2d 100644 --- a/plat/imx/imx8qm/imx8qm_bl31_setup.c +++ b/plat/imx/imx8qm/imx8qm_bl31_setup.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -27,12 +27,13 @@ #include #include -IMPORT_SYM(unsigned long, __COHERENT_RAM_START__, BL31_COHERENT_RAM_START); -IMPORT_SYM(unsigned long, __COHERENT_RAM_END__, BL31_COHERENT_RAM_END); -IMPORT_SYM(unsigned long, __RO_START__, BL31_RO_START); -IMPORT_SYM(unsigned long, __RO_END__, BL31_RO_END); +static const unsigned long BL31_COHERENT_RAM_START = BL_COHERENT_RAM_BASE; +static const unsigned long BL31_COHERENT_RAM_END = BL_COHERENT_RAM_END; +static const unsigned long BL31_RO_START = BL_CODE_BASE; +static const unsigned long BL31_RO_END = BL_CODE_END; +static const unsigned long BL31_RW_END = BL_END; + IMPORT_SYM(unsigned long, __RW_START__, BL31_RW_START); -IMPORT_SYM(unsigned long, __RW_END__, BL31_RW_END); static entry_point_info_t bl32_image_ep_info; static entry_point_info_t bl33_image_ep_info; diff --git a/plat/imx/imx8qx/imx8qx_bl31_setup.c b/plat/imx/imx8qx/imx8qx_bl31_setup.c index bfe405284..58c82ce60 100644 --- a/plat/imx/imx8qx/imx8qx_bl31_setup.c +++ b/plat/imx/imx8qx/imx8qx_bl31_setup.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -27,12 +27,13 @@ #include #include -IMPORT_SYM(unsigned long, __COHERENT_RAM_START__, BL31_COHERENT_RAM_START); -IMPORT_SYM(unsigned long, __COHERENT_RAM_END__, BL31_COHERENT_RAM_END); -IMPORT_SYM(unsigned long, __RO_START__, BL31_RO_START); -IMPORT_SYM(unsigned long, __RO_END__, BL31_RO_END); +static const unsigned long BL31_COHERENT_RAM_START = BL_COHERENT_RAM_BASE; +static const unsigned long BL31_COHERENT_RAM_END = BL_COHERENT_RAM_END; +static const unsigned long BL31_RO_START = BL_CODE_BASE; +static const unsigned long BL31_RO_END = BL_CODE_END; +static const unsigned long BL31_RW_END = BL_END; + IMPORT_SYM(unsigned long, __RW_START__, BL31_RW_START); -IMPORT_SYM(unsigned long, __RW_END__, BL31_RW_END); static entry_point_info_t bl32_image_ep_info; static entry_point_info_t bl33_image_ep_info; diff --git a/plat/intel/soc/common/include/socfpga_system_manager.h b/plat/intel/soc/common/include/socfpga_system_manager.h index f1637aed3..68e30b894 100644 --- a/plat/intel/soc/common/include/socfpga_system_manager.h +++ b/plat/intel/soc/common/include/socfpga_system_manager.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019, Intel Corporation. All rights reserved. + * Copyright (c) 2019-2020, Intel Corporation. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -106,7 +106,6 @@ #define SOCFPGA_CCU_NOC_CPU0_RAMSPACE0_0 0xf7004688 #define SOCFPGA_CCU_NOC_IOM_RAMSPACE0_0 0xf7018628 -void enable_nonsecure_access(void); void enable_ns_peripheral_access(void); void enable_ns_bridge_access(void); diff --git a/plat/nvidia/tegra/common/tegra_bl31_setup.c b/plat/nvidia/tegra/common/tegra_bl31_setup.c index 25fd84cdc..cbe3377b0 100644 --- a/plat/nvidia/tegra/common/tegra_bl31_setup.c +++ b/plat/nvidia/tegra/common/tegra_bl31_setup.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -42,11 +42,12 @@ extern void memcpy16(void *dest, const void *src, unsigned int length); ******************************************************************************/ IMPORT_SYM(uint64_t, __RW_START__, BL31_RW_START); -IMPORT_SYM(uint64_t, __RW_END__, BL31_RW_END); -IMPORT_SYM(uint64_t, __RODATA_START__, BL31_RODATA_BASE); -IMPORT_SYM(uint64_t, __RODATA_END__, BL31_RODATA_END); -IMPORT_SYM(uint64_t, __TEXT_START__, TEXT_START); -IMPORT_SYM(uint64_t, __TEXT_END__, TEXT_END); + +static const uint64_t BL31_RW_END = BL_END; +static const uint64_t BL31_RODATA_BASE = BL_RO_DATA_BASE; +static const uint64_t BL31_RODATA_END = BL_RO_DATA_END; +static const uint64_t TEXT_START = BL_CODE_BASE; +static const uint64_t TEXT_END = BL_CODE_END; extern uint64_t tegra_bl31_phys_base; diff --git a/plat/nvidia/tegra/soc/t194/drivers/include/mce_private.h b/plat/nvidia/tegra/soc/t194/drivers/include/mce_private.h index b6572fffb..1fe3aad39 100644 --- a/plat/nvidia/tegra/soc/t194/drivers/include/mce_private.h +++ b/plat/nvidia/tegra/soc/t194/drivers/include/mce_private.h @@ -53,7 +53,6 @@ uint64_t nvg_get_cstate_stat_query_value(void); int32_t nvg_is_sc7_allowed(void); int32_t nvg_online_core(uint32_t core); int32_t nvg_update_ccplex_gsc(uint32_t gsc_idx); -int32_t nvg_roc_clean_cache_trbits(void); int32_t nvg_enter_cstate(uint32_t state, uint32_t wake_time); int32_t nvg_roc_clean_cache_trbits(void); void nvg_enable_strict_checking_mode(void); diff --git a/plat/renesas/rcar/bl2_plat_setup.c b/plat/renesas/rcar/bl2_plat_setup.c index 193d80e70..578892eb3 100644 --- a/plat/renesas/rcar/bl2_plat_setup.c +++ b/plat/renesas/rcar/bl2_plat_setup.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018-2019, Renesas Electronics Corporation. All rights reserved. + * Copyright (c) 2018-2020, Renesas Electronics Corporation. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -39,12 +39,19 @@ #include "rcar_version.h" #include "rom_api.h" -IMPORT_SYM(unsigned long, __RO_START__, BL2_RO_BASE) -IMPORT_SYM(unsigned long, __RO_END__, BL2_RO_LIMIT) +#if RCAR_BL2_DCACHE == 1 +/* + * Following symbols are only used during plat_arch_setup() only + * when RCAR_BL2_DCACHE is enabled. + */ +static const uint64_t BL2_RO_BASE = BL_CODE_BASE; +static const uint64_t BL2_RO_LIMIT = BL_CODE_END; #if USE_COHERENT_MEM -IMPORT_SYM(unsigned long, __COHERENT_RAM_START__, BL2_COHERENT_RAM_BASE) -IMPORT_SYM(unsigned long, __COHERENT_RAM_END__, BL2_COHERENT_RAM_LIMIT) +static const uint64_t BL2_COHERENT_RAM_BASE = BL_COHERENT_RAM_BASE; +static const uint64_t BL2_COHERENT_RAM_LIMIT = BL_COHERENT_RAM_END; +#endif + #endif extern void plat_rcar_gic_driver_init(void); diff --git a/plat/renesas/rcar/bl31_plat_setup.c b/plat/renesas/rcar/bl31_plat_setup.c index bd83c415e..7bc0d8e27 100644 --- a/plat/renesas/rcar/bl31_plat_setup.c +++ b/plat/renesas/rcar/bl31_plat_setup.c @@ -1,6 +1,6 @@ /* * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. - * Copyright (c) 2015-2019, Renesas Electronics Corporation. All rights reserved. + * Copyright (c) 2015-2020, Renesas Electronics Corporation. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -22,12 +22,12 @@ #include "rcar_private.h" #include "rcar_version.h" -IMPORT_SYM(uint64_t, __RO_START__, BL31_RO_BASE) -IMPORT_SYM(uint64_t, __RO_END__, BL31_RO_LIMIT) +static const uint64_t BL31_RO_BASE = BL_CODE_BASE; +static const uint64_t BL31_RO_LIMIT = BL_CODE_END; #if USE_COHERENT_MEM -IMPORT_SYM(uint64_t, __COHERENT_RAM_START__, BL31_COHERENT_RAM_BASE) -IMPORT_SYM(uint64_t, __COHERENT_RAM_END__, BL31_COHERENT_RAM_LIMIT) +static const uint64_t BL31_COHERENT_RAM_BASE = BL_COHERENT_RAM_BASE; +static const uint64_t BL31_COHERENT_RAM_LIMIT = BL_COHERENT_RAM_END; #endif extern void plat_rcar_gic_driver_init(void); diff --git a/plat/st/stm32mp1/include/stm32mp1_boot_device.h b/plat/st/stm32mp1/include/stm32mp1_boot_device.h deleted file mode 100644 index a74598395..000000000 --- a/plat/st/stm32mp1/include/stm32mp1_boot_device.h +++ /dev/null @@ -1,18 +0,0 @@ -/* - * Copyright (c) 2019, STMicroelectronics - All Rights Reserved - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef STM32MP1_BOOT_DEVICE_H -#define STM32MP1_BOOT_DEVICE_H - -#include -#include -#include - -int plat_get_raw_nand_data(struct rawnand_device *device); -int plat_get_spi_nand_data(struct spinand_device *device); -int plat_get_nor_data(struct nor_device *device); - -#endif /* STM32MP1_BOOT_DEVICE_H */ diff --git a/plat/st/stm32mp1/stm32mp1_boot_device.c b/plat/st/stm32mp1/stm32mp1_boot_device.c index 2d8eccff7..997335d0d 100644 --- a/plat/st/stm32mp1/stm32mp1_boot_device.c +++ b/plat/st/stm32mp1/stm32mp1_boot_device.c @@ -7,6 +7,9 @@ #include #include +#include +#include +#include #include #include diff --git a/plat/st/stm32mp1/stm32mp1_def.h b/plat/st/stm32mp1/stm32mp1_def.h index 11b01ab88..5dc520625 100644 --- a/plat/st/stm32mp1/stm32mp1_def.h +++ b/plat/st/stm32mp1/stm32mp1_def.h @@ -23,7 +23,6 @@ #include #include #include -#include #include #include #endif