Add doc for some Cortex A53 errata workarounds
Add documentation for errata 835769 and 843419 workarounds introduced in
commit a94cc374ab
Fixes ARM-software/tf-issues#504
Change-Id: I7f3db53dfc5f3827b32663f483d3302bc9679b19
Signed-off-by: Douglas Raillard <douglas.raillard@arm.com>
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@ -51,10 +51,20 @@ For Cortex-A53, following errata build flags are defined :
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- ``ERRATA_A53_826319``: This applies errata 826319 workaround to Cortex-A53
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CPU. This needs to be enabled only for revision <= r0p2 of the CPU.
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- ``ERRATA_A53_835769``: This applies erratum 835769 workaround at compile and
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link time to Cortex-A53 CPU. This needs to be enabled for some variants of
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revision <= r0p4. This workaround can lead the linker to create ``*.stub``
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sections.
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- ``ERRATA_A53_836870``: This applies errata 836870 workaround to Cortex-A53
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CPU. This needs to be enabled only for revision <= r0p3 of the CPU. From
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r0p4 and onwards, this errata is enabled by default in hardware.
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- ``ERRATA_A53_843419``: This applies erratum 843419 workaround at link time
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to Cortex-A53 CPU. This needs to be enabled for some variants of revision
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<= r0p4. This workaround can lead the linker to emit ``*.stub`` sections
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which are 4kB aligned.
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- ``ERRATA_A53_855873``: This applies errata 855873 workaround to Cortex-A53
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CPUs. Though the erratum is present in every revision of the CPU,
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this workaround is only applied to CPUs from r0p3 onwards, which feature
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