plat: renesas: rcar: Fix coding style
Sort the header includes alphabetically and fix checkpatch warnings. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Change-Id: I08fd0d12ee1d8d61391e8afc33f8c67fcf70c4e5
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2015-2019, Renesas Electronics Corporation. All rights reserved.
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* Copyright (c) 2015-2020, Renesas Electronics Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -7,8 +7,8 @@
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#include <common/debug.h>
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#include <lib/mmio.h>
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#include "rcar_def.h"
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#include "cpg_registers.h"
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#include "rcar_def.h"
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#include "rcar_private.h"
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static void bl2_secure_cpg_init(void);
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@ -77,7 +77,7 @@ static void bl2_secure_cpg_init(void)
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stop_cr5 = 0xBFFFFFFFU;
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#endif
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/** Secure Module Stop Control Registers */
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/* Secure Module Stop Control Registers */
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cpg_write(SCMSTPCR0, 0xFFFFFFFFU);
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cpg_write(SCMSTPCR1, 0xFFFFFFFFU);
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cpg_write(SCMSTPCR2, stop_cr2);
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@ -91,7 +91,7 @@ static void bl2_secure_cpg_init(void)
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cpg_write(SCMSTPCR10, 0xFFFFFFFFU);
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cpg_write(SCMSTPCR11, 0xFFFFFFFFU);
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/** Secure Software Reset Access Enable Control Registers */
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/* Secure Software Reset Access Enable Control Registers */
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cpg_write(SCSRSTECR0, 0x00000000U);
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cpg_write(SCSRSTECR1, 0x00000000U);
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cpg_write(SCSRSTECR2, reset_cr2);
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@ -152,7 +152,7 @@ static void bl2_system_cpg_init_h3(void)
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#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RCAR_M3)
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static void bl2_realtime_cpg_init_m3(void)
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{
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/** Realtime Module Stop Control Registers */
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/* Realtime Module Stop Control Registers */
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cpg_write(RMSTPCR0, 0x00200000U);
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cpg_write(RMSTPCR1, 0xFFFFFFFFU);
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cpg_write(RMSTPCR2, 0x040E0FDCU);
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@ -169,7 +169,7 @@ static void bl2_realtime_cpg_init_m3(void)
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static void bl2_system_cpg_init_m3(void)
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{
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/** System Module Stop Control Registers */
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/* System Module Stop Control Registers */
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cpg_write(SMSTPCR0, 0x00200000U);
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cpg_write(SMSTPCR1, 0xFFFFFFFFU);
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cpg_write(SMSTPCR2, 0x040E2FDCU);
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@ -188,7 +188,7 @@ static void bl2_system_cpg_init_m3(void)
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#if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RCAR_M3N)
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static void bl2_realtime_cpg_init_m3n(void)
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{
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/** Realtime Module Stop Control Registers */
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/* Realtime Module Stop Control Registers */
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cpg_write(RMSTPCR0, 0x00210000U);
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cpg_write(RMSTPCR1, 0xFFFFFFFFU);
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cpg_write(RMSTPCR2, 0x040E0FDCU);
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@ -1,23 +1,22 @@
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/*
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* Copyright (c) 2015-2017, Renesas Electronics Corporation. All rights reserved.
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* Copyright (c) 2015-2020, Renesas Electronics Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <string.h>
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#include <platform_def.h>
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#include <common/debug.h>
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#include <drivers/io/io_driver.h>
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#include <drivers/io/io_storage.h>
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#include <drivers/io/io_semihosting.h>
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#include "io_common.h"
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#include "io_rcar.h"
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#include "io_memdrv.h"
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#include "io_emmcdrv.h"
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#include "io_private.h"
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#include "io_rcar.h"
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#include <platform_def.h>
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static uintptr_t emmcdrv_dev_handle;
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static uintptr_t memdrv_dev_handle;
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@ -167,7 +166,7 @@ static int32_t open_rcar(const uintptr_t spec);
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struct plat_io_policy {
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uintptr_t *dev_handle;
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uintptr_t image_spec;
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int32_t(*check) (const uintptr_t spec);
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int32_t (*check)(const uintptr_t spec);
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};
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static const struct plat_io_policy policies[] = {
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@ -305,7 +304,7 @@ static const struct plat_io_policy policies[] = {
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(uintptr_t) &bl338_cert_file_spec,
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&open_rcar}, {
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#else
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{
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{
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#endif
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0, 0, 0}
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};
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@ -322,16 +321,11 @@ static io_drv_spec_t io_drv_spec_emmcdrv = {
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0,
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};
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static struct plat_io_policy drv_policies[]
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__attribute__ ((section(".data"))) = {
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static struct plat_io_policy drv_policies[] __attribute__ ((section(".data"))) = {
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/* FLASH_DEV_ID */
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{
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&memdrv_dev_handle,
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(uintptr_t) &io_drv_spec_memdrv, &open_memmap,},
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/* EMMC_DEV_ID */
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{
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&emmcdrv_dev_handle,
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(uintptr_t) &io_drv_spec_emmcdrv, &open_emmcdrv,}
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{ &memdrv_dev_handle, (uintptr_t) &io_drv_spec_memdrv, &open_memmap, },
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/* EMMC_DEV_ID */
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{ &emmcdrv_dev_handle, (uintptr_t) &io_drv_spec_emmcdrv, &open_emmcdrv, }
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};
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static int32_t open_rcar(const uintptr_t spec)
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