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fix(stm32mp1_clk): fix RTC clock rating 

When RTC clock source is HSE, the RTCDIV is not taken into account.

Change-Id: I1613b638e8932c03f3349adb01e13f5294a3bf5d
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
This commit is contained in:
Gabriel Fernandez 2021-07-27 15:39:16 +02:00 committed by Yann Gautier
parent 15509093f0
commit cbd2e8a6af
1 changed files with 9 additions and 1 deletions
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10
drivers/st/clk/stm32mp1_clk.c
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@ -56,6 +56,7 @@ enum stm32mp1_parent_id {
_HSI_KER = NB_OSC,
_HSE_KER,
_HSE_KER_DIV2,
_HSE_RTC,
_CSI_KER,
_PLL1_P,
_PLL1_Q,
@ -125,6 +126,7 @@ static const uint8_t parent_id_clock_id[_PARENT_NB] = {
[_HSI_KER] = CK_HSI,
[_HSE_KER] = CK_HSE,
[_HSE_KER_DIV2] = CK_HSE_DIV2,
[_HSE_RTC] = _UNKNOWN_ID,
[_CSI_KER] = CK_CSI,
[_PLL1_P] = PLL1_P,
[_PLL1_Q] = PLL1_Q,
@ -490,7 +492,7 @@ static const uint8_t per_parents[] = {
};
static const uint8_t rtc_parents[] = {
_UNKNOWN_ID, _LSE, _LSI, _HSE
_UNKNOWN_ID, _LSE, _LSI, _HSE_RTC
};
static const struct stm32mp1_clk_sel stm32mp1_clk_sel[_PARENT_SEL_NB] = {
@ -587,6 +589,7 @@ static const char * const stm32mp1_clk_parent_name[_PARENT_NB] __unused = {
[_HSI_KER] = "HSI_KER",
[_HSE_KER] = "HSE_KER",
[_HSE_KER_DIV2] = "HSE_KER_DIV2",
[_HSE_RTC] = "HSE_RTC",
[_CSI_KER] = "CSI_KER",
[_PLL1_P] = "PLL1_P",
[_PLL1_Q] = "PLL1_Q",
@ -969,6 +972,10 @@ static unsigned long get_clock_rate(int p)
case _HSE_KER_DIV2:
clock = stm32mp1_clk_get_fixed(_HSE) >> 1;
break;
case _HSE_RTC:
clock = stm32mp1_clk_get_fixed(_HSE);
clock /= (mmio_read_32(rcc_base + RCC_RTCDIVR) & RCC_DIVR_DIV_MASK) + 1U;
break;
case _LSI:
clock = stm32mp1_clk_get_fixed(_LSI);
break;
@ -2152,6 +2159,7 @@ static void secure_parent_clocks(unsigned long parent_id)
case _HSE:
case _HSE_KER:
case _HSE_KER_DIV2:
case _HSE_RTC:
case _LSE:
break;